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* Correct SPL uses of SIFIVE_OTPSimon Glass2023-02-101-2/+2
* Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass2022-10-312-2/+2
* riscv: sifive: Fix OF_BOARD boot failureBin Meng2022-01-072-2/+2
* riscv: Enable SPI flash env for SiFive Unmatched.Thomas Skibo2021-12-021-0/+1
* riscv: Support booting SiFive Unmatched from SPI.Thomas Skibo2021-12-021-0/+3
* sandbox: Remove OF_HOSTFILEIlias Apalodimas2021-10-272-2/+4
* board: sifive: Fix -Wint-to-pointer-cast warningBin Meng2021-10-202-2/+2
* board: sifive: Fix a potential build warning in board_fdt_blob_setup()Bin Meng2021-10-202-4/+4
* Merge tag 'v2021.10-rc4' into nextTom Rini2021-09-162-16/+5
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| * board: sifive: use ccache driver instead of helper functionZong Li2021-09-072-16/+5
* | riscv: sifive: unleashed: Add genimage config filesBin Meng2021-09-112-0/+38
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* board: sifive: overwrite board_fdt_blob_setup in u-boot properZong Li2021-08-172-0/+22
* board: sifive: compile stuff only related to SPL in SPL buildZong Li2021-08-172-3/+4
* global: Convert simple_strtoul() with decimal to dectoul()Simon Glass2021-08-021-3/+3
* global: Convert simple_strtoul() with hex to hextoul()Simon Glass2021-08-021-1/+1
* board: sifive: unmatched: reset USB hub, PCIe-USB bridge, and ULPI device in SPLVincent Chen2021-07-211-0/+36
* board: sifive: unmatched: refine GEMGXL initialized function in SPLVincent Chen2021-07-211-19/+39
* board: sifive: drop stuff related to unmatched revision 1Zong Li2021-07-211-26/+2
* board: sifive: remove the command for setting serial numberZong Li2021-07-211-22/+1
* board: sifive: support spl multi-dtb on unmatched boardZong Li2021-07-061-2/+26
* board: sifive: Add an interface to get PCB revisionZong Li2021-07-061-0/+32
* riscv: sifive: fu740: kconfig: Enable support for Opencores I2C controllerZong Li2021-07-061-0/+1
* board: sifive: unmatched: add initial support for a platform ID EEPROMZong Li2021-07-062-0/+543
* board: sifive: add HiFive Unmatched board supportGreen Wan2021-05-316-0/+179
* riscv: sifive: unleashed: Switch to use binman to generate u-boot.itbBin Meng2021-05-191-0/+1
* riscv: sifive: Rename fu540 board to unleashedBin Meng2021-04-085-9/+9
* dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass2021-01-051-1/+1
* riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controllerPragnesh Patel2020-11-281-0/+1
* riscv: sifive/fu540: Move SPL related functions to spl.cBin Meng2020-08-142-34/+32
* riscv: sifive/fu540: Drop NET_RANDOM_ETHADDRBin Meng2020-08-141-1/+0
* riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC levelBin Meng2020-08-141-22/+0
* riscv: sifive/fu540: spl: Rename soc_spl_init()Bin Meng2020-08-141-1/+1
* riscv: sifive/fu540: spl: Drop our own version of board_init_f()Bin Meng2020-08-141-18/+1
* Revert "Revert "riscv: sifive: fu540: Add gpio-restart support""Bin Meng2020-07-241-0/+2
* sifive: fu540: Mark the default env as SPI flashJagan Teki2020-07-241-0/+1
* sifive: fu540: Add runtime boot mode detectionJagan Teki2020-07-241-6/+19
* riscv: sifive: fu540: Enable SiFive PWM driverPragnesh Patel2020-07-241-0/+2
* Revert "riscv: sifive: fu540: Add gpio-restart support"WIP/06Jul2020Tom Rini2020-07-061-2/+0
* riscv: sifive: fu540: enable all cache ways from U-Boot properPragnesh Patel2020-07-031-1/+9
* riscv: sifive: fu540: Add gpio-restart supportBin Meng2020-07-031-0/+2
* sifive: fu540: Add sample SD gpt partition layoutJagan Teki2020-06-041-0/+2
* riscv: sifive: fu540: add SPL configurationPragnesh Patel2020-06-044-1/+108
* riscv: cpu: fu540: Add support for cpu fu540Pragnesh Patel2020-06-041-1/+1
* sifive: fu540: add ddr driverPragnesh Patel2020-06-041-0/+2
* riscv: sifive: fu540: Use OTP DM driver for serial environment variablePragnesh Patel2020-06-042-73/+42
* fu540: Remove ARCH= references from documentationTom Rini2020-06-021-0/+1
* sifive: fix palmer's email addressPragnesh Patel2020-05-261-1/+1
* common: Drop linux/bug.h from common headerSimon Glass2020-05-181-0/+1
* command: Remove the cmd_tbl_t typedefSimon Glass2020-05-181-0/+1
* common: Drop init.h from common headerSimon Glass2020-05-181-0/+1
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