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* arch: m68k: Use existing CONFIG_MCFTMR instead of CFG_MCFTMRMarek Vasut2023-04-152-2/+2
| | | | | | | | | | There is an existing CONFIG_MCFTMR Kconfig symbol, use it and drop all other instances of CFG_MCFTMR. This duality is likely a result of bogus conversion to Kconfig. Fixes: 7ff7b46e6ce ("m68k: rename CONFIG_MCFTMR to CFG_MCFTMR") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
* board: freescale: lx2160a: remove the PL01X device instantiationIoana Ciornei2023-04-041-34/+0
| | | | | | | | | There is no need for the board file to instantiate a PL01X platform device anymore. This is all taken care of by the DM code which now will probe the device based on the DT node. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* arm64: imx8mp: Drop EQoS GPR[1] board workaroundMarek Vasut2023-03-301-17/+0
| | | | | | | | The EQoS interface mode is now configured in common board_interface_eth_init() and called by EQoS MAC driver when appropriate. Drop the board side duplicates if the same functionality. Signed-off-by: Marek Vasut <marex@denx.de>
* mx51evk: Remove unused mx51evk_video.c fileFabio Estevam2023-03-301-98/+0
| | | | | | | | | Since commit 1fa43cad8625 ("video: Drop references to CONFIG_VIDEO et al") the mx51evk_video.c is no longer used. Remove the unused file. Signed-off-by: Fabio Estevam <festevam@denx.de>
* mx53loco: Remove unused mx53loco_video.c fileFabio Estevam2023-03-301-114/+0
| | | | | | | | | Since commit 1fa43cad8625 ("video: Drop references to CONFIG_VIDEO et al") the mx53loco_video.c is no longer used. Remove the unused file. Signed-off-by: Fabio Estevam <festevam@denx.de>
* mx6sabresd: Convert to DM_PMICFabio Estevam2023-03-291-50/+13
| | | | | | | | | | The usage of DM_PMIC is preferred, so convert to it. This also brings the benefit of causing a significant amount of code removal. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* mx6sabreauto: Convert to DM_PMICFabio Estevam2023-03-291-94/+13
| | | | | | | | | | The usage of DM_PMIC is preferred, so convert to it. This also brings the benefit of causing a significant amount of code removal. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* mx6sxsabreauto: Remove myself from MAINTAINERSFabio Estevam2023-03-291-1/+1
| | | | | | | | I don't have access to the mx6sxsabreauto board, so remove myself from the MAINTAINERS entry and add Peng instead. Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Peng Fan <peng.fan@nxp.com>
* mx53loco: Add DM_I2C supportFabio Estevam2023-03-291-18/+18
| | | | | | | The conversion to DM_I2C is mandatory, so add support for it. Signed-off-by: Fabio Estevam <festevam@denx.de>
* imx8ulp_evk: Clear data at fdt_addr_r before booting kernelYe Li2023-03-291-0/+8
| | | | | | | | | | | | | When using dual boot mode, the DDR won't be reset when APD power off or reboot. It has possibility that obsolete fdt data existing on fdt_addr_r address. Then even nothing in EFI partitions, the distro boot still continue to parse fdt and get uboot crashed. Clear the data at fdt_addr_r, so the fdt header check in above case will not pass. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* imx8ulp_evk: disable overflow of port0 for LPAVPeng Fan2023-03-292-2/+2
| | | | | | | | | | | Bit0: Port 0 behavior when bandwidth maximized. Set to 1 to allow overflow With overflow set, we see some issue that A35 may not able to get enough bandwidth and A35 will report hrtimer takes too much time, workqueue lockup. With overflow cleared, the issues are gone. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8ulp_evk: Update DDR ports arbitration for DCNANO underrunYe Li2023-03-292-4/+4
| | | | | | | | | | To resolve DCNANO underrun issue, change the DDR Port 0 arbitration from round robin fashion to fixed priority level 1, while other ports are not assigned any priority, so they will be serviced in round robin fashion if there is no active request from Port 0. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
* imx8ulp_evk: Change to use DDR driverYe Li2023-03-292-208/+1
| | | | | | | Remove the DDR initialization codes from board and enable the iMX8ULP DDR driver. Signed-off-by: Ye Li <ye.li@nxp.com>
* imx8ulp_evk: Update the DDR timingJacky Bai2023-03-291-102/+102
| | | | | | | | Update the dram timing to support PLL bypass mode for F1. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
* imx: imx8ulp: Configure XRDC PDAC and MSC for DBD owner=S400 onlyYe Li2023-03-291-3/+5
| | | | | | | | | | | | | This patch is used to support DBD owner fuse changed to S400 only. The XRDC PDAC2 for LPAV pbridge5 and MSC1/2/3 for GPIO and LPAV are not configured by S400 default setting. So these PDAC and MSC are invalid, only DBD owner can access the corresponding resources. We have to configure necessary PDAC and MSC for SPL before DDR initialization. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* imx: imx8ulp: Adjust handshake to sync TRDC and XRDC completionYe Li2023-03-291-7/+1
| | | | | | | | | | | | | | | | | | To fit the DBD_EN fused part, we re-design the TRDC and XRDC assignment. M33 will be the TRDC owner and needs to configure TRDC. A35 is the XRDC owner, ATF will configure XRDC. The handshake between U-boot and M33 image is used to sync TRDC and XRDC configuration completion. Once the handshake is done, A35 and M33 can access the allowed resources in others domain. The handshake is needed when M33 is booted or DBD_EN fused, because both cases will enable the TRDC. If handshake is timeout, the boot will hang. We use SIM GPR0 to pass the info from SPL to u-boot, because before the handshake, u-boot can't access SEC SIM and FSB. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
* imx: imx8ulp: Get chip revision from SentinelYe Li2023-03-291-7/+3
| | | | | | | | | In both SPL and u-boot, after probing the S400 MU, get the chip revision, lifecycle and UID from Sentinel. Update get_cpu_rev to use the chip revision not hard coded it for A0 Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* Merge branch 'master' into nextTom Rini2023-03-273-20/+4
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| * board: m5253demo: remove floating point flash size calculationAngelo Dureghello2023-03-151-18/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This board is using floating point arithmetic to display the SST39VF6401B flash size. This actually generates errors with toolchains without appropriate sw fp math functions available. SST39VF6401B is the only flash for wich the size is displayed, it's size is 8192KB and floating point calculation seems not needed. Removing it. Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
| * m68k: rename CONFIG_MCFTMR to CFG_MCFTMRAngelo Dureghello2023-03-152-2/+2
| | | | | | | | | | | | This is not a Kconfig option so changing to _CFG. Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
* | board: freescale: ls1088a: remove code under !CONFIG_DM_ETHIoana Ciornei2023-03-143-830/+4
| | | | | | | | | | | | | | | | Now that DM_ETH is enabled by default, there is no point in keeping the non-DM_ETH code which initialized the ethernet interfaces. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | board: freescale: ls2080aqds: remove code under !CONFIG_DM_ETHIoana Ciornei2023-03-142-979/+4
| | | | | | | | | | | | | | | | Now that DM_ETH is enabled by default, there is no point in keeping the non-DM_ETH code which initialized the ethernet interfaces. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | board: freescale: ls2080rdb: remove code under !CONFIG_DM_ETHIoana Ciornei2023-03-142-96/+1
| | | | | | | | | | | | | | | | Now that DM_ETH is enabled by default, there is no point in keeping the non-DM_ETH code which initialized the ethernet interfaces. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | board: freescale: lx2160a: remove code under !CONFIG_DM_ETHIoana Ciornei2023-03-144-1699/+8
| | | | | | | | | | | | | | | | Now that DM_ETH is enabled by default, there is no point in keeping the non-DM_ETH code which initialized the ethernet interfaces. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | board: freescale: lx2160a: remove hardcoded ethernet initializationIoana Ciornei2023-03-141-144/+0
|/ | | | | | | | | | | The LX2160ARDB board has support for DM_ETH probed devices, which means that we do not need to manually create an MDIO controller, register it, create PHYs on it etc. In order to cleanup the board file a bit, just remove this code entirely. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* Correct SPL uses of FEC_MXCSimon Glass2023-02-102-2/+2
| | | | | | | This converts 4 usages of this option to the non-SPL form, since there is no SPL_FEC_MXC defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
* Correct SPL uses of TARGET_LX2160ARDBSimon Glass2023-02-101-3/+3
| | | | | | | This converts 3 usages of this option to the non-SPL form, since there is no SPL_TARGET_LX2160ARDB defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
* Correct SPL uses of DWC_ETH_QOSSimon Glass2023-02-092-2/+2
| | | | | | | This converts 3 usages of this option to the non-SPL form, since there is no SPL_DWC_ETH_QOS defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
* freescale: Drop unused zm7300 driverSimon Glass2023-02-073-254/+0
| | | | | | This is not used anymore. Drop the driver and Kconfig option. Signed-off-by: Simon Glass <sjg@chromium.org>
* freescale: Drop unused vsc3316_3308 driverSimon Glass2023-02-072-531/+0
| | | | | | This is not used. Drop the driver and Kconfig option. Signed-off-by: Simon Glass <sjg@chromium.org>
* imx: Drop CONFIG_USE_PLUGINSimon Glass2023-02-071-4/+0
| | | | | | This option is not defined anywhere. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* freescale: Drop CONFIG_TARGET_MPC8536DS et alSimon Glass2023-02-071-3/+0
| | | | | | | This option as well as CONFIG_TARGET_P1022DS and CONFIG_TARGET_P5020DS are not defined anywhere. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
* freescale: Drop unused pq-mds-pib driverSimon Glass2023-02-073-70/+0
| | | | | | This is not used. Drop the driver and Kconfig option. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Drop unused CONFIG_P2020DSSimon Glass2023-02-071-1/+0
| | | | | | This option does not exist, so the Makefile rule does nothing. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* freescale: Drop unused pixis codeSimon Glass2023-02-073-525/+0
| | | | | | Drop this unused code. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag 'fsl-qoriq-2023-2-1' of ↵Tom Rini2023-02-011-1/+1
|\ | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq make QSPI clock selection optional during SoC init for ls102xa Fix regulator name for ls2_sfp Update NXP RCW github repo
| * ls1021atsn: Suggest the NXP RCW github repoFabio Estevam2023-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As explained in the text at the bottom of the page https://source.codeaurora.org/external/qoriq/qoriq-components/rcw: "QUIC repositories on this site will not receive any updates after March 31, 2022, and will be deleted on March 31, 2023." Point to the NXP RCW github repo instead. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: Suggest the NXP ATF github repoFabio Estevam2023-01-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As explained in the text at the bottom of the page https://source.codeaurora.org/external/imx/imx-atf: "QUIC repositories on this site will not receive any updates after March 31, 2022, and will be deleted on March 31, 2023." Point to the NXP ATF github repo instead. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
* | imx: mx6sxsabreauto: select DM_SERIALPeng Fan2023-01-311-16/+0
| | | | | | | | | | | | Select DM_SERIAL Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: mx6sllevk: select DM_SERIALPeng Fan2023-01-311-16/+0
| | | | | | | | | | | | Select DM_SERIAL Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: mx6sllevk: correct pmic namePeng Fan2023-01-311-1/+1
| | | | | | | | | | | | The prefix 0 has been dropped in dts, so correct in board file Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: mx6ull/z_14x14_evk: clean up UART iomuxPeng Fan2023-01-311-16/+0
| | | | | | | | | | | | | | After DM_SERIAL, and set pinctrl_uart1 as pre-reloc, no need initialize iomux at board file. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | ARM: imx: Remove PMIC reset configuration from board filesMarek Vasut2023-01-304-12/+0
|/ | | | | | | | | | | | | | | | The PCA9450 reset configuration can now be performed by the PCA9450 PMIC driver itself, remove the hard-coded variant from board code and let the PMIC driver perform this task using one-liner: ``` $ sed -i '/set WDOG_B_CFG to cold reset/,+2 d' $(git grep -l PCA9450_RESET_CTRL.*0xA1 board/) ``` Venice and i.MX93 EVK required slight manual fix up. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* global: Finish CONFIG -> CFG migrationTom Rini2023-01-2013-41/+41
| | | | | | | | | | | | | At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* kbuild: Remove uncmd_spl logicTom Rini2022-12-232-2/+2
| | | | | | | | | | | | At this point in the conversion there should be no need to have logic to disable some symbol during the SPL build as all symbols should have an SPL counterpart. The main real changes done here are that we now must make proper use of CONFIG_IS_ENABLED(DM_SERIAL) rather than many of the odd tricks we developed prior to CONFIG_IS_ENABLED() being available. Signed-off-by: Tom Rini <trini@konsulko.com>
* global: Migrate CONFIG_VSC7385_IMAGE et al to CFGTom Rini2022-12-232-4/+4
| | | | | | | | Perform simple renames of: CONFIG_VSC7385_IMAGE to CFG_VSC7385_IMAGE CONFIG_VSC7385_IMAGE_SIZE to CFG_VSC7385_IMAGE_SIZE Signed-off-by: Tom Rini <trini@konsulko.com>
* global: Migrate CONFIG_SLIC to CFGTom Rini2022-12-231-1/+1
| | | | | | Perform a simple rename of CONFIG_SLIC to CFG_SLIC Signed-off-by: Tom Rini <trini@konsulko.com>
* global: Migrate CONFIG_RESET_VECTOR_ADDRESS to CFGTom Rini2022-12-235-5/+5
| | | | | | Perform a simple rename of CONFIG_RESET_VECTOR_ADDRESS to CFG_RESET_VECTOR_ADDRESS Signed-off-by: Tom Rini <trini@konsulko.com>
* global: Migrate CONFIG_ICS307_REFCLK_HZ to CFGTom Rini2022-12-231-2/+2
| | | | | | Perform a simple rename of CONFIG_ICS307_REFCLK_HZ to CFG_ICS307_REFCLK_HZ Signed-off-by: Tom Rini <trini@konsulko.com>
* global: Migrate CONFIG_FSL_SERDES2 to CFGTom Rini2022-12-231-3/+3
| | | | | | Perform a simple rename of CONFIG_FSL_SERDES2 to CFG_FSL_SERDES2 Signed-off-by: Tom Rini <trini@konsulko.com>
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