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* spl: fit: implement fdt_record_loadablePhilipp Tomsich2017-11-262-0/+59
| | | | | | | | | | | | | | | During the loading of more complex FIT images (e.g. when the invoked next stage needs to find additional firmware for a power-management core... or if there are multiple images for different privilege levels started in parallel), it is helpful to create a record of what images are loaded where: if a FDT is loaded for one of the next stages, it can be used to convey the status and location of loadables. This adds a fdt_record_loadable() function that can be invoked to record the status of each loadable below the /fit-images path. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* spl: fit: simplify logic for FDT loading for non-OS bootsPhilipp Tomsich2017-11-261-30/+56
| | | | | | | | | | | | | | | | | To better support bootin through an ATF or OPTEE, we need to streamline some of the logic for when the FDT is appended to an image: depending on the image type, we'd like to append the FDT not at all (the case for the OS boot), to the 'firmware' image (if it is a U-Boot) or to one of the loadables (if the 'firmware' is an ATF, an OPTEE, or some other image-type and U-Boot is listed in the loadabled). To achieve this goal, we drop the os_boot flag and track the type of image loaded. If it is of type IH_OS_U_BOOT, we append the FDT. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* spl: change load_addr and entry_point to uintptr_tPhilipp Tomsich2017-11-261-3/+6
| | | | | | | | Mainly a stylistic change: convert the load_addr and entry_point fields of struct spl_image_info to uintptr_t (from ulong). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* spl: add a fdt_addr field to spl_image_infoPhilipp Tomsich2017-11-261-0/+3
| | | | | | | | | | When loading a full U-Boot with detached device-tree using the SPL FIT backend, we should store the address of the FDT loaded as part of the SPL image info: this allows us to fixup the FDT with additional info we may want to propagate onward. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* image: add IH_OS_ARM_TRUSTED_FIRMWARE for ARM Trusted FirmwarePhilipp Tomsich2017-11-262-0/+2
| | | | | | | | | | | | | To boot on ARMv8 systems with ARM Trusted Firmware, we need to assemble an ATF-specific parameter structure and also provide the address of the images started by ATF (e.g. BL3-3, which may be the full U-Boot). To allow us to identify an ARM Trusted Firmware contained in a FIT image, this adds the necessary definitions. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-arcTom Rini2017-11-246-4/+135
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| * arc: cache: Add required NOPs after invalidation of instruction cacheAlexey Brodkin2017-11-241-0/+7
| | | | | | | | | | | | | | | | As per ARC HS databook (see chapter 5.3.3.2) it is required to add 3 NOPs after each write to IC_IVIC which we do from now on. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Eugeniy Paltsev <paltsev@synopsys.com>
| * arc: bootm: Move slave cores kick-starting under !fakeAlexey Brodkin2017-11-241-4/+4
| | | | | | | | | | | | | | | | Currently slave cores will be kick-started even if we want to dry run bootm which is not what we really want. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Eugeniy Paltsev <paltsev@synopsys.com>
| * ARC: HSDK: introduce CREG GPIO driverEugeniy Paltsev2017-11-244-0/+124
| | | | | | | | | | | | | | The HSDK can manage some pins via CREG registers block. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2017-11-2325-138/+455
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| * binman: Return non-zero exit code on test failureSimon Glass2017-11-221-2/+6
| | | | | | | | | | | | Return exit code 1 when test fail so that callers can detect this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Add add test for using an Intel MRC binarySimon Glass2017-11-222-0/+20
| | | | | | | | | | | | | | | | | | MRC (Memory Reference Code) is a binary blob used to set up the SDRAM controller on some Intel boards. Add a test for this feature. With this test coverage on binman is back up to 100%. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Add add test for SPL with a microcode pointerSimon Glass2017-11-223-31/+84
| | | | | | | | | | | | | | Add a test for this feature. It allows SPL to hold a pointer to the microcode block. This is used for 64-bit U-Boot on x86. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Add a test for x86-start16-splSimon Glass2017-11-222-1/+22
| | | | | | | | | | | | | | This allows us to put the 16-bit x86 start-up code in SPL. Add a test for it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Add test for u-boot-spl-bss-padSimon Glass2017-11-226-1/+64
| | | | | | | | | | | | Add a test that we can pad the BSS with zero bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Check for files missing from test coverageSimon Glass2017-11-221-3/+19
| | | | | | | | | | | | | | Files that are never imported are not shown in the test-coverage report. Detect these and show an error. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Increase test coverage back to 100%Simon Glass2017-11-221-7/+4
| | | | | | | | | | | | Make a minor tweak to fix test coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Add a main program to the testsSimon Glass2017-11-222-0/+8
| | | | | | | | | | | | | | Add a main program so that the tests can be executed directly, without going through the main binman program. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Add tests for importlib availabilitySimon Glass2017-11-222-2/+36
| | | | | | | | | | | | | | Add a test that the 'entry' module works with or without importlib. The tests are numbered so that they are executed in the correct order. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Set up 'entry' to permit full test coverageSimon Glass2017-11-223-5/+10
| | | | | | | | | | | | | | | | | | | | There is a little check at the top of entry.py which decides if importlib is available. At present this has no test coverage. To add this we will need to import the module twice, once with importlib and once without. In preparation for allowing a test to control the importing of this module, remove all global imports of the 'entry' module. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Append to PYTHONPATH when running test coverageSimon Glass2017-11-221-1/+1
| | | | | | | | | | | | | | Rather that overwrite this, append to it, in case the caller has already set up the path correctly. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dtoc: Fix up testsSimon Glass2017-11-221-45/+37
| | | | | | | | | | | | | | The tool has changed slightly since it was originally written. Update the tests to suit. Signed-off-by: Simon Glass <sjg@chromium.org>
| * buildman: Fix up testsSimon Glass2017-11-221-10/+21
| | | | | | | | | | | | | | | | | | | | | | The tests were broken by two separate commits which adjusted the output when boards are listed. Fix this by adding back a PowerPC board and putting the name of each board in the test. Fixes: b9f7d881 (powerpc, 5xx: remove some "5xx" remains) Fixes: 8d7523c5 (buildman: Allow showing the list of boards with -n) Signed-off-by: Simon Glass <sjg@chromium.org>
| * buildman: Allow skipping of tests which use the networkSimon Glass2017-11-223-4/+11
| | | | | | | | | | | | | | Accessing the network slows down the test and limits the environment in which it can be run. Add an option to disable network tests. Signed-off-by: Simon Glass <sjg@chromium.org>
| * patman: Fix up tests to pass with newest checkpatchSimon Glass2017-11-221-15/+26
| | | | | | | | | | | | The checkpatch tool was updated but the patman tests were not. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * test/run: Report and return failureSimon Glass2017-11-221-3/+17
| | | | | | | | | | | | | | | | | | This script runs the tests but does not report failure. Also it always returns an exit code of 0 even on failure. Fix these problems by checking the result of each test. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Disable the no-unit_address_vs_reg warningsSimon Glass2017-11-221-1/+2
| | | | | | | | | | | | These warnings are not useful for binman tests. Disable them. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Rename tests to ftestSimon Glass2017-11-222-2/+2
| | | | | | | | | | | | | | | | | | | | At present these tests use the same filename as patman. This adds confusion when running all tests, since error messages look very similar. In fact binman tries to run the wrong tests at present. Rename the tests. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Add a Makefile for test-program compilationSimon Glass2017-11-223-8/+36
| | | | | | | | | | | | | | | | | | | | | | These test programs are includedd as binary files in U-Boot to avoid having to build them (and associated toolchain differences). Instructions on building are in the files themselves, but it seems better to provide a Makefile which can be manually run when desired. Add a Makefile, separate from the normal build system, to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Add docs explaining how to enable binman for a boardSimon Glass2017-11-221-0/+21
| | | | | | | | | | | | | | The process is not obvious. Add a little section to explain how to move a board to use binman. Signed-off-by: Simon Glass <sjg@chromium.org>
| * binman: Add better Makefile debuggingSimon Glass2017-11-222-5/+16
| | | | | | | | | | | | | | | | | | There is a debugging option in the Makefile to allow people to figure out which u-boot.dtsi files are used in the build. But is it not easy to use since it only shows files it finds, not those it is looking for. Update it and update the mention of it to the docs. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2017-11-2260-892/+676
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| * rockchip: remove duplicate CONFIG_ENV_SIZE definitionsPhilipp Tomsich2017-11-213-5/+0
| | | | | | | | | | | | | | | | A few header files still have a definition of CONFIG_ENV_SIZE, causing warnings during buildman runs. This removes the duplicate definitions from evb_px5.h, geekbox.h and rv1108_common.h. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: check download key before bootupAndy Yan2017-11-211-3/+46
| | | | | | | | | | | | | | | | | | | | Enter download mode if the download key pressed. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [Converted printfs in boot_mode.c to debug/pr_err:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: add support for enter to bootrom download modeAndy Yan2017-11-213-2/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rockchip bootrom will enter download mode if it returns from spl/tpl with a non-zero value and couldn't find a valid image in the backup partition. This patch provide a method to instruct the system to back to bootrom download mode by checking the BROM_DOWNLOAD_FLAG register. As the bootrom download function relys on some modules such as interrupts, so we need to back to bootrom as early as possbile before the tpl/spl code override the interrupt configurations. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: make boot_mode related codes reused across all platformsAndy Yan2017-11-219-73/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | setup_boot_mode function use the same logic but different mode register address across all the rockchip platforms, so it's better to make this function reused across all the platforms, and let the mode register address setting from the config file. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: spi: the symbol for Hertz is HzHeinrich Schuchardt2017-11-211-1/+1
| | | | | | | | | | | | | | | | fix typo Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: clock: update sysreset driver bindingKever Yang2017-11-218-24/+112
| | | | | | | | | | | | | | | | Using priv for new sysreset driver binding. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: sysreset: update Makefile to work with merged sysreset driverPhilipp Tomsich2017-11-211-10/+1
| | | | | | | | | | | | | | | | After applying the merged sysreset driver, there are build failures due to an out-of-sync Makefile. This updates drivers/sysreset/Makefile to address these build failures. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: sysreset: merge into one common driverKever Yang2017-11-2110-397/+52
| | | | | | | | | | | | | | | | | | | | Use a common driver for all Rockchip SOC instead of one for each SoC. Use driver_data for reg offset. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: mkimage: remove unused code-paths (spl_boot0 is now implied)Philipp Tomsich2017-11-211-31/+14
| | | | | | | | | | | | | | | | | | | | With all targets converted to generate prepadded images, this removes the spl_boot0 field from our config structure and removes the unused code-path (for images that are not prepadded): i.e. spl_boot0 is now implied as 'true' and the code is specialised by removing the other case. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: rk3188: move CONFIG_SPL_* entries from rk3188_common.h to KconfigPhilipp Tomsich2017-11-212-7/+6
| | | | | | | | | | | | | | | | There still are a few CONFIG_SPL_* options selected using defines from rk3188_common.h instead of via Kconfig. This migrates those over to Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: back-to-bootrom: allow passing a cmd to the bootromPhilipp Tomsich2017-11-219-12/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | The BROM supports forcing it to enter download-mode, if an appropriate result/cmd-word is returned to it. There already is a series to support this in review, so this prepares the (newly C-version) of the back-to-bootrom code to accept a cmd to passed on to the BROM. All the existing call-sites are adjusted to match the changed function signature. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
| * rockchip: rk3188: use boot0 hook to load up SPL in 2 stepsPhilipp Tomsich2017-11-216-112/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the RK3188, the BROM will attempt to load up the first stage image (SPL for the RK3188) in two steps: first 1KB to offset 0x800 in the SRAM and then the remainder to offset 0xc00 in the SRAM. It always enters at 0x804, though. With this changeset, the RK3188 boot removes the TPL (stub) stage and builds a single SPL binary that utilizes the early back-to-bootrom via the boot0-hook. Consequently, the passing of the saved boot params via pmu->os_reg[2] is also removed. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: back-to-bootrom: replace assembly-implementation with C-codePhilipp Tomsich2017-11-214-79/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | The back-to-bootrom implementation for Rockchip has always relied on the stack-pointer being valid on entry, so there was little reason to have this as an assembly implementation. This provides a new C-only implementation of save_boot_params and back_to_bootrom (relying on setjmp/longjmp) and removes the older assembly-only implementation. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
| * arm: provide a PCS-compliant setjmp implementationPhilipp Tomsich2017-11-214-81/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous setjmp-implementation (as a static inline function that contained an 'asm volatile' sequence) was extremely fragile: (some versions of) GCC optimised the set of registers. One critical example was the removal of 'r9' from the clobber list, if -ffixed-reg9 was supplied. To increase robustness and ensure PCS-compliant behaviour, the setjmp and longjmp implementation are now in assembly and closely match what one would expect to find in a libc implementation. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
| * arm: mark save_boot_params_ret as a functionPhilipp Tomsich2017-11-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | As no '.type' was set for save_boot_params_ret in start.S, binutils did not track whether it was emitted as A32 or T32. By properly marking save_boot_params_ret as a potential function entry, we can make sure that the compiler will insert the appropriate instructions for branching to save_boot_params_ret both for call-sites emitted as A32 and T32. Reported-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
| * arm: make save_boot_params_ret prototype visible for AArch64Philipp Tomsich2017-11-211-31/+31
| | | | | | | | | | | | | | | | | | | | | | | | The save_boot_params_ret() prototype (for those of us, that have a valid SP on entry and can implement save_boot_params() in C), was previously only defined for !defined(CONFIG_ARM64). This moves the declaration to a common block to ensure the prototype is available to everyone that might need it. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
| * rockchip: boot0 hook: support early return for RK3188/RK3066-style BROMPhilipp Tomsich2017-11-212-6/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 1KB data from NAND into SRAM and executes it. Then, following a return to bootrom, the BROM loads additional code to SRAM (not overwriting the first block read) and reenters at the same address as the first time. To support booting either a TPL (on the RK3066) or SPL (on the RK3188) using this model of having to count entries, this commit adds code to the boot0 hook to track the number of entries and handle them accordingly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
| * bcm281xx: boot0 hook: adjust to unified boot0 semanticsPhilipp Tomsich2017-11-211-0/+2
| | | | | | | | | | | | | | | | This updates the BCM281xx boot0-hook to the updated boot0 semantics by emitting _start and the vector table before the boot0 hook (as was the case before). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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