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* Merge branch 'next' of git://git.denx.de/u-boot-usb into nextWIP/01Oct2020-nextTom Rini2020-10-016-118/+98
|\ | | | | | | - Assorted XHCI improvements
| * usb: xhci-rcar: Add support for R8A774A1 SoCLad Prabhakar2020-10-011-0/+1
| | | | | | | | | | | | | | | | The R8A774A1 is compatible with the generic rcar-gen3-xhci controller. This patch adds the compatibility flag, to support the xHCI controller. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
| * usb: xhci: convert to readx_poll_sleep_timeout()Chunfeng Yun2020-10-011-14/+11
| | | | | | | | | | | | | | Use readx_poll_sleep_timeout() to poll the register status Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: use macros with parameter to fill ep_info2Chunfeng Yun2020-10-013-20/+7
| | | | | | | | | | | | | | | | Use macros with parameter to fill ep_info2, then some macros for MASK and SHIFT can be removed Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: convert to TRB_TX_TYPE()Chunfeng Yun2020-10-012-3/+2
| | | | | | | | | | | | | | Use TRB_TX_TYPE() instead of (TRB_DATA_OUT/IN << TRB_TX_TYPE_SHIFT) Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: convert to TRB_LEN() and TRB_INTR_TARGET()Chunfeng Yun2020-10-012-12/+7
| | | | | | | | | | | | | | | | | | | | For normal TRB fields: use TRB_LEN(x) instead of ((x) & TRB_LEN_MASK); and use TRB_INTR_TARGET(x) instead of (((x) & TRB_INTR_TARGET_MASK) << TRB_INTR_TARGET_SHIFT) Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: convert to TRB_TYPE()Chunfeng Yun2020-10-013-9/+6
| | | | | | | | | | | | | | Use TRB_TYPE(p) instead of ((p) << TRB_TYPE_SHIFT) Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: convert to HCS_MAX_PORTS()Chunfeng Yun2020-10-012-4/+1
| | | | | | | | | | | | | | | | Use HCS_MAX_PORTS(p) instead of ((p & HCS_MAX_PORTS_MASK) >> HCS_MAX_PORTS_SHIFT) Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: add quirks flag to support MediaTek xHCI 0.96Chunfeng Yun2020-10-014-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There some vendor quirks for MTK xHCI 0.96 host controller: 1. It defines some extra SW scheduling parameters for HW to minimize the scheduling effort for synchronous and interrupt endpoints. The parameters are put into reserved DWs of slot context and endpoint context. 2. Its TDS in Normal TRB defines a number of packets that remains to be transferred for a TD after processing all Max packets in all previous TRBs. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: create one unified function to calculate TRB TD remainderChunfeng Yun2020-10-012-55/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xhci versions 1.0 and later report the untransferred data remaining in a TD a bit differently than older hosts. We used to have separate functions for these, and needed to check host version before calling the right function. Now Mediatek host has an additional quirk on how it uses the TD Size field for remaining data. To prevent yet another function for calculating remainder we instead want to make one quirk friendly unified function. Porting from the Linux: c840d6ce772d("xhci: create one unified function to calculate TRB TD remainder.") 124c39371114("xhci: use boolean to indicate last trb in td remainder calculation") Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: xhci: add a member hci_version in xhci_ctrl structChunfeng Yun2020-10-013-2/+4
| | | | | | | | | | | | | | Add a member to save xHCI version, it's used some times. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Revert "net: smc911x: Automatically Update ethaddr with MAC"Tom Rini2020-10-011-3/+0
| | | | | | | | | | | | | | | | | | | | | | Upon further discussion on the mailing list, we should not get in the situation where the generic code path to set ethaddr/etc correctly does not work. Revert this until someone can further debug the smc911x driver regarding this issue. This reverts commit 387cbf096e443705fa66776027273ed257ec6ca3. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'next' of git://git.denx.de/u-boot-sh into nextTom Rini2020-10-0137-116/+4690
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| * net: ravb: Remove writeext function callBiju Das2020-09-261-2/+0
| | | | | | | | | | | | | | | | | | The micrel phy driver is already configuring this values from device tree. So remove the redundant phy configuration call from this driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * board: renesas: draak: Drop CA57 resetBiju Das2020-09-261-14/+1
| | | | | | | | | | | | | | | | | | | | | | Renesas Draak board based on R-Car D3 has single CA53. This patch drops check for cputype from reset_cpu() and also drops the corresponding CA57 macros. While at it also dropped RST_RSTOUTCR macro which is unused. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * board: renesas: remove empty board_early_init_f functionBiju Das2020-09-264-10/+2
| | | | | | | | | | | | | | | | Remove empty board_early_init_f function, since it is disabled in ebisu and condor board configs. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * arm: rmobile: Use imply for BOARD_EARLY_INIT_FBiju Das2020-09-262-1/+2
| | | | | | | | | | | | | | | | | | | | | | Use "imply" instead of "select" for BOARD_EARLY_INIT_F config option, and then disable it on boards which don't need it. Updated grpeach_defconfig to disable CONFIG_BOARD_EARLY_INIT_F option for RZA1. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * board: renesas: Remove empty s_init functionBiju Das2020-09-265-20/+0
| | | | | | | | | | | | | | | | Default s_init weak function available, so remove the s_init empty function. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * arm: mach-rmobile: Mark the default s_init function as weakBiju Das2020-09-261-0/+6
| | | | | | | | | | | | | | | | Mark the default s_init function as weak, so that SoC's can override it if needed, and it will still be discarded if unused. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * arm: dts: r8a774e1: Import DTS from Linux 5.9-rc4Biju Das2020-09-263-0/+1759
| | | | | | | | | | | | | | | | Import R8A774E1 (RZ/G2H) SoC DTSI and headers from upstream Linux kernel 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * arm: dts: r8a774b1: Import DTS from Linux 5.9-rc4Biju Das2020-09-263-0/+2713
| | | | | | | | | | | | | | | | Import R8A774B1 (RZ/G2N) SoC DTSI and headers from upstream Linux kernel 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * arm: dts: r8a774a1: Import DTS from Linux 5.9-rc4Biju Das2020-09-263-57/+51
| | | | | | | | | | | | | | | | Synchronize RZ/G2M SoC DTs with mainline Linux 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * pinctrl: renesas: Fix PINCTRL_PFC_R8A774A1 help descriptionBiju Das2020-09-261-10/+10
| | | | | | | | | | | | | | | | | | | | | | R8A774A1 is part of Renesas RZ/G2 series and not R-Car, reflect the same for PINCTRL_PFC_R8A774A1 help description Alongside, sort the PINCTRL_PFC_R8A774A1 config option as per increasing number of the SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * arm: rmobile: Identify R8A7796 r1.3 SoCBiju Das2020-09-261-2/+7
| | | | | | | | | | | | | | Add support to identify R8A7796 r1.3 SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * ARM: rmobile: Enable dfu tftp on Gen3Marek Vasut2020-09-265-0/+48
| | | | | | | | | | | | | | | | Enable the fitImage update options on RCar Gen3 boards. This permits easy update of multiple bootloader components. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Enable RPC on Salvator-X, ULCB, EbisuMarek Vasut2020-09-2614-0/+91
| | | | | | | | | | | | | | | | | | | | | | | | Enable the RPC Hyperflash driver on R8A7795,R8A7796,R8A77965 Salvator-X,ULCB and R8A77990 Ebisu. Note that to make the HF accessible, mainline ATF is mandatory and must be built with RCAR_RPC_HYPERFLASH_LOCKED=0 . Note that this is intended for development and testing convenience only and must be disabled in deployment for platform security reasons. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch '2020-09-30-assorted-network-improvements' into nextTom Rini2020-10-0122-72/+494
|\ \ | | | | | | | | | | | | | | | - Generic UDP framework - TFTP fixes - dwc_eth_qos, smc911x, smc911x and mscc phy fixes
| * | sntp: use udp frameworkWIP/30Sep2020-next2Philippe Reynes2020-09-305-34/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commits update the support of sntp to use the framework udp. This change allows to remove all the reference to sntp in the main network file net/net.c. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | sandbox: enable support of generic udp protocolPhilippe Reynes2020-09-301-0/+1
| | | | | | | | | | | | | | | | | | | | | This commit enable the support of the generic udp protocol. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | net: add a generic udp protocolPhilippe Reynes2020-09-307-2/+142
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds a generic udp protocol framework in the network loop. So protocol based on udp may be implemented without modifying the network loop (for example custom wait magic packet). Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | net: dwc_eth_qos: Convert to use APIs which support live DTPatrick Delaunay2020-09-301-4/+3
| | | | | | | | | | | | | | | | | | | | | Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the driver can support live DT. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | phy: add support for stingray PAXB PHY controllerSrinath Mannam2020-09-303-0/+185
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for stingray PAXB PHY controller driver. This driver supports maximum 8 PAXB phys using pipemux data. Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | net: use log_err() for 'No ethernet found' messageHeinrich Schuchardt2020-09-302-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Write the 'No ethernet found' message via the log drivers. This allows suppressing it during output via the syslog driver. This fixes the problem reported in: [PATCH 0/4] log: Fix the syslog spam when running tests https://lists.denx.de/pipermail/u-boot/2020-September/426343.html Reported-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | net: tftp: Fix load_block offset calculationLey Foon Tan2020-09-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When load the last block, the "len" might not be a block size. This cause loading the incorrect last block data. The fix change "len" to tftp_block_size and minus one tftp_block_size for offset calculation. Use same offset calculation formula as in store_block(). Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
| * | net: tftp: Fix store_block offset calculationLey Foon Tan2020-09-301-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tftp_cur_block start with 1 for first block, but tftp_cur_block counter is start with zero when block number is rollover. The existing code "tftp_cur_block - 1" will cause the block number become -1 in store_block() when tftp_cur_block is 0 when tftp_cur_block is rollover. The fix pass in tftp_cur_block to store_block() and minus the tftp_block_size when do the offset calculation. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
| * | net: tftp: Fix tftp_prev_block counter updateLey Foon Tan2020-09-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes missing update to tftp_prev_block counter before increase tftp_cur_block counter when do the tftpput operation. tftp_prev_block counter is used in update_block_number() function to check whether block number (sequence number) is rollover. This bug cause the tftpput command fail to upload a large file when block number is greater than 16-bit (0xFFFF). Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
| * | net: smc911x: Automatically Update ethaddr with MACAdam Ford2020-09-301-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ethernet controller can read the MAC from EEPROM and display it, but if ethaddr is not set, the ethernet is still unavailable. This patch checks will automatically set the MAC address if it has not already been set. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: ftgmac100: Add support for board specific PHY interface addressThirupathaiah Annapureddy2020-09-301-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ftgmac100 driver is using hard-coded PHY interface address of zero. Each board can have different PHY interface address (phy_addr). This commit modifies the driver to make use of board specific address by leveraging CONFIG_PHY_ADDR. Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
| * | net: phy: mscc: sync rx/tx delay settings with Linux on vsc85xxHeiko Stuebner2020-09-301-24/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux kernel does set the clock delays to - 0.2 ns (their default, and lowest, hardware value) if delays should not be enabled - 2.0 ns (which causes the data to be sampled at exactly half way between clock transitions at 1000 Mbps) if delays should be enabled depending on the interface mode See https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/mscc/mscc_main.c#n523 So instead of using arbitrary delay values like now, mimic this behaviour. The behaviour is the same for all of vsc8530/8531/8540/8541 so move that to a shared function while at it. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * | net: phy: mscc: make clock-output configurable on vsc85xxHeiko Stuebner2020-09-301-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vsc8530/8531/8540/8541 phys have a configurable clock output that can emit 25, 50 and 125 MHz rates, which in turn may be needed for stable network connections. This follows a similar change introduced into the Linux kernel at https://lore.kernel.org/netdev/20200609133140.1421109-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | | Merge branch '2020-09-30-add-new-apis' into nextTom Rini2020-09-3042-33/+3268
|\ \ \ | |/ / |/| | | | | | | | - SCMI firmware support - regmap, GPIO, reset API enhancements
| * | firmware: smci: sandbox test for SCMI reset controllersWIP/30Sep2020-nextEtienne Carriere2020-09-306-6/+211
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add tests for SCMI reset controllers. A test device driver sandbox-scmi_devices.c is used to get reset resources, allowing further resets manipulation. Change sandbox-smci_agent to emulate 1 reset controller exposed through an agent. Add DM test scmi_resets to test this reset controller. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | reset: add reset controller driver for SCMI agentsEtienne Carriere2020-09-305-0/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change introduces a reset controller driver for SCMI agent devices. When SCMI agent and SCMI reset domain drivers are enabled, SCMI agent binds a reset controller device for each SCMI reset domain protocol devices enabled in the FDT. SCMI reset driver is embedded upon CONFIG_RESET_SCMI=y. If enabled, CONFIG_SCMI_AGENT is also enabled. SCMI Reset Domain protocol is defined in the SCMI specification [1]. Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | firmware: scmi: sandbox test for SCMI clocksEtienne Carriere2020-09-307-11/+431
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add tests for SCMI clocks. A test device driver sandbox-scmi_devices.c is used to get clock resources, allowing further clock manipulation. Change sandbox-smci_agent to emulate 3 clocks exposed through 2 agents. Add DM test scmi_clocks to test these 3 clocks. Update DM test sandbox_scmi_agent with load/remove test sequences factorized by {load|remove}_sandbox_scmi_test_devices() helper functions. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | clk: add clock driver for SCMI agentsEtienne Carriere2020-09-305-3/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change introduces a clock driver for SCMI agent devices. When SCMI agent and SCMI clock drivers are enabled, SCMI agent binds a clock device for each SCMI clock protocol devices enabled in the FDT. SCMI clock driver is embedded upon CONFIG_CLK_SCMI=y. If enabled, CONFIG_SCMI_AGENT is also enabled. SCMI Clock protocol is defined in the SCMI specification [1]. Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Cc: Lukasz Majewski <lukma@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | dt-bindings: arm: SCMI bindings documentationEtienne Carriere2020-09-301-0/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | Dump SCMI DT bindings documentation from Linux kernel source tree v5.8-rc1. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | firmware: scmi: support Arm SMCCC transportEtienne Carriere2020-09-303-3/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change implements a SMCCC transport for SCMI exchanges. This implementation follows the Linux kernel as references implementation for SCMI message processing, using the SMT format for communication channel meta-data. Use of SMCCC transport in SCMI FDT bindings are defined in the Linux kernel DT bindings since v5.8. SMCCC with SMT is implemented in OP-TEE from tag 3.9.0 [2]. Links: [2] https://github.com/OP-TEE/optee_os/commit/a58c4d706d23 Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | firmware: scmi: mailbox/smt agent deviceEtienne Carriere2020-09-305-2/+333
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change implements a mailbox transport using SMT format for SCMI exchanges. This implementation follows the Linux kernel and SCP-firmware [1] as references implementation for SCMI message processing using SMT format for communication channel meta-data. Use of mailboxes in SCMI FDT bindings are defined in the Linux kernel DT bindings since v4.17. Links: [1] https://github.com/ARM-software/SCP-firmware Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | firmware: add SCMI agent uclassEtienne Carriere2020-09-3015-0/+505
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change introduces SCMI agent uclass to interact with a firmware using the SCMI protocols [1]. SCMI agent uclass currently supports a single method to request processing of the SCMI message by an identified server. A SCMI message is made of a byte payload associated to a protocol ID and a message ID, all defined by the SCMI specification [1]. On return from process_msg() method, the caller gets the service response. SCMI agent uclass defines a post bind generic sequence for all devices. The sequence binds all the SCMI protocols listed in the FDT for that SCMI agent device. Currently none, but later change will introduce protocols. This change implements a simple sandbox device for the SCMI agent uclass. The sandbox nicely answers SCMI_NOT_SUPPORTED to SCMI messages. To prepare for further test support, the sandbox exposes a architecture function for test application to read the sandbox emulated devices state. Currently supports 2 SCMI agents, identified by an ID in the FDT device name. The simplistic DM test does nothing yet. SCMI agent uclass is designed for platforms that embed a SCMI server in a firmware hosted somewhere, for example in a companion co-processor or in the secure world of the executing processor. SCMI protocols allow an SCMI agent to discover and access external resources as clock, reset controllers and more. SCMI agent and server communicate following the SCMI specification [1]. This SCMI agent implementation complies with the DT bindings defined in the Linux kernel source tree regarding SCMI agent description since v5.8. Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | test: dm: Add tests for regmap managed API and regmap fieldsJean-Jacques Hiblot2020-09-302-0/+211
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tests rely on a dummy driver to allocate and initialize the regmaps and the regmap fields using the managed API. The first test checks if the regmap config fields like width, reg_offset_shift, range specifiers, etc work. The second test checks if regmap fields behave properly (mask and shift are ok) by peeking into the regmap. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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