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-rw-r--r--doc/develop/driver-model/nvmxip.rst45
-rw-r--r--doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt56
2 files changed, 100 insertions, 1 deletions
diff --git a/doc/develop/driver-model/nvmxip.rst b/doc/develop/driver-model/nvmxip.rst
index fe087b13d2..09afdbcccf 100644
--- a/doc/develop/driver-model/nvmxip.rst
+++ b/doc/develop/driver-model/nvmxip.rst
@@ -25,7 +25,33 @@ The NVMXIP Uclass provides the following drivers:
the Uclass creates a block device and binds it with the nvmxip-blk.
The Uclass driver implemented by drivers/mtd/nvmxip/nvmxip-uclass.c
- The implementation is generic and can be used by different platforms.
+ nvmxip_qspi driver :
+
+ The driver probed with the DT and is the parent of the blk#<id> device.
+ nvmxip_qspi can be reused by other platforms. If the platform
+ has custom settings to apply before using the flash, then the platform
+ can provide its own parent driver belonging to UCLASS_NVMXIP and reuse
+ nvmxip-blk. The custom driver can be implemented like nvmxip_qspi in
+ addition to the platform custom settings.
+ The nvmxip_qspi driver belongs to UCLASS_NVMXIP.
+ The driver implemented by drivers/mtd/nvmxip/nvmxip_qspi.c
+
+ For example, if we have two NVMXIP devices described in the DT
+ The devices hierarchy is as follows:
+
+::
+
+ => dm tree
+
+ Class Index Probed Driver Name
+ -----------------------------------------------------------
+ ...
+ nvmxip 0 [ + ] nvmxip_qspi |-- nvmxip-qspi1@08000000
+ blk 3 [ + ] nvmxip-blk | `-- nvmxip-qspi1@08000000.blk#1
+ nvmxip 1 [ + ] nvmxip_qspi |-- nvmxip-qspi2@08200000
+ blk 4 [ + ] nvmxip-blk | `-- nvmxip-qspi2@08200000.blk#2
+
+The implementation is generic and can be used by different platforms.
Supported hardware
--------------------------------
@@ -43,6 +69,23 @@ config NVMXIP
handles the read operation. This driver is HW agnostic and can support
multiple flash devices at the same time.
+config NVMXIP_QSPI
+ This option allows the emulation of a block storage device on top of a QSPI XIP flash.
+ Any platform that needs to emulate one or multiple QSPI XIP flash devices can turn this
+ option on to enable the functionality. NVMXIP config is selected automatically.
+ Platforms that need to add custom treatments before accessing to the flash, can
+ write their own driver (same as nvmxip_qspi in addition to the custom settings).
+
+Device Tree nodes
+--------------------
+
+Multiple QSPI XIP flash devices can be used at the same time by describing them through DT
+nodes.
+
+Please refer to the documentation of the DT binding at:
+
+doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+
Contributors
------------
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
diff --git a/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
new file mode 100644
index 0000000000..cc60e9efdc
--- /dev/null
+++ b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
@@ -0,0 +1,56 @@
+Specifying NVMXIP information for devices
+======================================
+
+QSPI XIP flash device nodes
+---------------------------
+
+Each flash device should have its own node.
+
+Each node must specify the following fields:
+
+1)
+ compatible = "nvmxip,qspi";
+
+This allows to bind the flash device with the nvmxip_qspi driver
+If a platform has its own driver, please provide your own compatible
+string.
+
+2)
+ reg = <0x0 0x08000000 0x0 0x00200000>;
+
+The start address and size of the flash device. The values give here are an
+example (when the cell size is 2).
+
+When cell size is 1, the reg field looks like this:
+
+ reg = <0x08000000 0x00200000>;
+
+3)
+
+ lba_shift = <9>;
+
+The number of bit shifts used to calculate the size in bytes of one block.
+In this example the block size is 1 << 9 = 2 ^ 9 = 512 bytes
+
+4)
+
+ lba = <4096>;
+
+The number of blocks.
+
+Example of multiple flash devices
+----------------------------------------------------
+
+ nvmxip-qspi1@08000000 {
+ compatible = "nvmxip,qspi";
+ reg = <0x0 0x08000000 0x0 0x00200000>;
+ lba_shift = <9>;
+ lba = <4096>;
+ };
+
+ nvmxip-qspi2@08200000 {
+ compatible = "nvmxip,qspi";
+ reg = <0x0 0x08200000 0x0 0x00100000>;
+ lba_shift = <9>;
+ lba = <2048>;
+ };