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-rw-r--r--doc/board/AndesTech/ax25-ae350.rst19
-rw-r--r--doc/board/congatec/cgtqmx8.rst70
-rw-r--r--doc/board/congatec/index.rst9
-rw-r--r--doc/board/index.rst1
-rw-r--r--doc/develop/driver-model/index.rst1
-rw-r--r--doc/develop/driver-model/nvme.rst (renamed from doc/README.nvme)25
-rw-r--r--doc/git-mailrc2
-rw-r--r--doc/usage/index.rst8
-rw-r--r--doc/usage/mmc.rst4
-rw-r--r--doc/usage/pinmux.rst95
-rw-r--r--doc/usage/ums.rst57
11 files changed, 265 insertions, 26 deletions
diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc/board/AndesTech/ax25-ae350.rst
index 923649240e..b46f427f4b 100644
--- a/doc/board/AndesTech/ax25-ae350.rst
+++ b/doc/board/AndesTech/ax25-ae350.rst
@@ -58,15 +58,6 @@ Platform Level Interrupt Controller (PLIC)
- Configurable number of targets: 1-16
- Preempted interrupt priority stack
-Configurations
---------------
-
-CONFIG_SKIP_LOWLEVEL_INIT:
-
-If you want to boot this system from SPI ROM and bypass e-bios (the
-other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT
-in "include/configs/ax25-ae350.h".
-
Build and boot steps
--------------------
@@ -89,12 +80,10 @@ Verification:
Steps
-----
-1. Define CONFIG_SKIP_LOWLEVEL_INIT to build u-boot which is loaded via gdb from ram.
-2. Undefine CONFIG_SKIP_LOWLEVEL_INIT to build u-boot which is booted from spi rom.
-3. Ping a server by mac driver
-4. Scan sd card and copy u-boot image which is booted from flash to ram by sd driver.
-5. Burn this u-boot image to spi rom by spi driver
-6. Re-boot u-boot from spi flash with power off and power on.
+1. Ping a server by mac driver
+2. Scan sd card and copy u-boot image which is booted from flash to ram by sd driver
+3. Burn this u-boot image to spi rom by spi driver
+4. Re-boot u-boot from spi flash with power off and power on
Messages of U-Boot boot on AE350 board
--------------------------------------
diff --git a/doc/board/congatec/cgtqmx8.rst b/doc/board/congatec/cgtqmx8.rst
new file mode 100644
index 0000000000..bccdef2f16
--- /dev/null
+++ b/doc/board/congatec/cgtqmx8.rst
@@ -0,0 +1,70 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the Congatec conga-QMX8 board
+========================================
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get scfw_tcm.bin and ahab-container.img
+- Get imx-mkimage
+- Build U-Boot
+- Build imx-mkimage
+- Flash the binary into the SD card
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+.. code-block:: bash
+
+ $ git clone https://source.codeaurora.org/external/imx/imx-atf
+ $ cd imx-atf/
+ $ git checkout origin/imx_4.14.78_1.0.0_ga -b imx_4.14.78_1.0.0_ga
+ $ make PLAT=imx8qm bl31
+
+Get scfw_tcm.bin and ahab-container.img
+---------------------------------------
+
+.. code-block:: bash
+
+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-sc-firmware-1.1.bin
+ $ chmod +x imx-sc-firmware-1.1.bin
+ $ ./imx-sc-firmware-1.1.bin
+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin
+ $ chmod +x firmware-imx-8.0.bin
+ $ ./firmware-imx-8.0.bin
+
+Or use this to avoid running random scripts from the internet,
+but note that you must agree to the license the script displays:
+
+.. code-block:: bash
+
+ $ dd if=imx-sc-firmware-1.1.bin of=imx-sc-firmware-1.1.tar.bz2 bs=37185 skip=1
+ $ tar -xf imx-sc-firmware-1.1.tar.bz2
+ $ cp imx-sc-firmware-1.1/mx8qx-val-scfw-tcm.bin $(builddir)
+
+ $ dd if=firmware-imx-8.0.bin of=firmware-imx-8.0.tar.bz2 bs=37180 skip=1
+ $ tar -xf firmware-imx-8.0.tar.bz2
+ $ cp firmware-imx-8.0/firmware/seco/mx8qm-ahab-container.img $(builddir)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+ $ export ATF_LOAD_ADDR=0x80000000
+ $ export BL33_LOAD_ADDR=0x80020000
+ $ make cgtqmx8_defconfig
+ $ make u-boot.bin
+ $ make flash.bin
+
+Flash the binary into the SD card
+---------------------------------
+
+Burn the flash.bin binary to SD card offset 32KB:
+
+.. code-block:: bash
+
+ $ sudo dd if=flash.bin of=/dev/sd[x] bs=1k seek=32 conv=fsync
diff --git a/doc/board/congatec/index.rst b/doc/board/congatec/index.rst
new file mode 100644
index 0000000000..cc57b36b2e
--- /dev/null
+++ b/doc/board/congatec/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Congatec
+========
+
+.. toctree::
+ :maxdepth: 2
+
+ cgtqmx8.rst
diff --git a/doc/board/index.rst b/doc/board/index.rst
index a70d2de19d..747511f7dd 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -11,6 +11,7 @@ Board-specific doc
AndesTech/index
amlogic/index
atmel/index
+ congatec/index
coreboot/index
emulation/index
freescale/index
diff --git a/doc/develop/driver-model/index.rst b/doc/develop/driver-model/index.rst
index 10a76256b0..7366ef818c 100644
--- a/doc/develop/driver-model/index.rst
+++ b/doc/develop/driver-model/index.rst
@@ -19,6 +19,7 @@ subsystems
i2c-howto
livetree
migration
+ nvme
of-plat
pci-info
pmic-framework
diff --git a/doc/README.nvme b/doc/develop/driver-model/nvme.rst
index e8f9be149e..736c0a063d 100644
--- a/doc/README.nvme
+++ b/doc/develop/driver-model/nvme.rst
@@ -1,11 +1,13 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2017 NXP Semiconductors
-# Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2017 NXP Semiconductors
+.. Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
-What is NVMe
+NVMe Support
============
+What is NVMe
+------------
+
NVM Express (NVMe) is a register level interface that allows host software to
communicate with a non-volatile memory subsystem. This interface is optimized
for enterprise and client solid state drives, typically attached to the PCI
@@ -48,6 +50,8 @@ identified.
To list all of the NVMe hard disks, try:
+.. code-block:: none
+
=> nvme info
Device 0: Vendor: 0x8086 Rev: 8DV10131 Prod: CVFT535600LS400BGN
Type: Hard Disk
@@ -55,10 +59,14 @@ To list all of the NVMe hard disks, try:
and print out detailed information for controller and namespaces via:
+.. code-block:: none
+
=> nvme detail
Raw block read/write to can be done via the 'nvme read/write' commands:
+.. code-block:: none
+
=> nvme read a0000000 0 11000
=> tftp 80000000 /tftpboot/kernel.itb
@@ -66,6 +74,8 @@ Raw block read/write to can be done via the 'nvme read/write' commands:
Of course, file system command can be used on the NVMe hard disk as well:
+.. code-block:: none
+
=> fatls nvme 0:1
32376967 kernel.itb
22929408 100m
@@ -81,4 +91,7 @@ QEMU supports NVMe emulation and we can test NVMe driver with QEMU x86 running
U-Boot. Please see README.x86 for how to build u-boot.rom image for QEMU x86.
Example command line to call QEMU x86 below with emulated NVMe device:
-$ ./qemu-system-i386 -drive file=nvme.img,if=none,id=drv0 -device nvme,drive=drv0,serial=QEMUNVME0001 -bios u-boot.rom
+
+.. code-block:: bash
+
+ $ ./qemu-system-i386 -drive file=nvme.img,if=none,id=drv0 -device nvme,drive=drv0,serial=QEMUNVME0001 -bios u-boot.rom
diff --git a/doc/git-mailrc b/doc/git-mailrc
index 34f936f4d8..dc7b39b32f 100644
--- a/doc/git-mailrc
+++ b/doc/git-mailrc
@@ -119,7 +119,7 @@ alias kerneldoc uboot, marex
alias fdt uboot, sjg
alias i2c uboot, hs
alias kconfig uboot, masahiro
-alias mmc uboot, freenix
+alias mmc uboot, freenix, jaehoon
alias nand uboot
alias net uboot, jhersh
alias phy uboot, jhersh
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index c1f9b6a53b..843b4371f1 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -34,12 +34,14 @@ Shell commands
load
loady
mbr
- mmc
md
+ mmc
+ pinmux
pstore
qfw
+ reset
sbi
+ scp03
size
true
- scp03
- reset
+ ums
diff --git a/doc/usage/mmc.rst b/doc/usage/mmc.rst
index 458c7642c0..f20efe3d70 100644
--- a/doc/usage/mmc.rst
+++ b/doc/usage/mmc.rst
@@ -19,7 +19,7 @@ Synopsis
mmc wp
mmc bootbus <dev> <boot_bus_width> <reset_boot_bus_width> <boot_mode>
mmc bootpart-resize <dev> <dev part size MB> <RPMB part size MB>
- mmc partconf <dev> [boot_ack boot_partition partition_access]
+ mmc partconf <dev> [[varname] | [<boot_ack> <boot_partition> <partition_access>]]
mmc rst-function <dev> <value>
Description
@@ -92,6 +92,8 @@ The 'mmc bootbus' command sets the BOOT_BUS_WIDTH field. (*Refer to eMMC specifi
The 'mmc partconf' command shows or changes PARTITION_CONFIG field.
+ varname
+ When showing the PARTITION_CONFIG, an optional environment variable to store the current boot_partition value into.
boot_ack
boot acknowledge value
boot_partition
diff --git a/doc/usage/pinmux.rst b/doc/usage/pinmux.rst
new file mode 100644
index 0000000000..9f4392cd0d
--- /dev/null
+++ b/doc/usage/pinmux.rst
@@ -0,0 +1,95 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+pinmux command
+==============
+
+Synopsis
+--------
+
+::
+
+ pinmux list
+ pinmux dev [pincontroller-name]
+ pinmux status [-a | pin-name]
+
+Description
+-----------
+
+The pinmux command is used to show the pin-controller muxing.
+
+The 'pinmux list' command diplays the available pin-controller.
+
+The 'pinmux dev' command selects the pin-controller for next commands.
+
+ pincontroller-name
+ name of the pin-controller to select
+
+The 'pinmux status' command displays the pin muxing information.
+
+ \-a
+ display pin muxing of all pin-controllers.
+ pin-name
+ name of the pin to display
+
+Example
+-------
+
+::
+
+ => pinmux list
+ | Device | Driver | Parent
+ | pinctrl-gpio | sandbox_pinctrl_gpio | root_driver
+ | pinctrl | sandbox_pinctrl | root_driver
+ =>
+ => pinmux dev pinctrl
+ dev: pinctrl
+ =>
+ => pinmux status
+ P0 : UART TX.
+ P1 : UART RX.
+ P2 : I2S SCK.
+ P3 : I2S SD.
+ P4 : I2S WS.
+ P5 : GPIO0 bias-pull-up input-disable.
+ P6 : GPIO1 drive-open-drain.
+ P7 : GPIO2 bias-pull-down input-enable.
+ P8 : GPIO3 bias-disable.
+ =>
+ => pinmux status P0
+ P0 : UART TX.
+ =>
+ => pinmux status -a
+ --------------------------
+ pinctrl-gpio:
+ a0 : gpio input .
+ a1 : gpio input .
+ a2 : gpio input .
+ a3 : gpio input .
+ a4 : gpio input .
+ a5 : gpio output .
+ a6 : gpio output .
+ a7 : gpio input .
+ a8 : gpio input .
+ a9 : gpio input .
+ --------------------------
+ pinctrl:
+ P0 : UART TX.
+ P1 : UART RX.
+ P2 : I2S SCK.
+ P3 : I2S SD.
+ P4 : I2S WS.
+ P5 : GPIO0 bias-pull-up input-disable.
+ P6 : GPIO1 drive-open-drain.
+ P7 : GPIO2 bias-pull-down input-enable.
+ P8 : GPIO3 bias-disable.
+
+Configuration
+-------------
+
+The pinmux command is only available if CONFIG_CMD_PINMUX=y.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the command succeded and to 1 (false)
+otherwise.
diff --git a/doc/usage/ums.rst b/doc/usage/ums.rst
new file mode 100644
index 0000000000..3cde5fa1f2
--- /dev/null
+++ b/doc/usage/ums.rst
@@ -0,0 +1,57 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+ums command
+===========
+
+Synopsis
+--------
+
+::
+
+ ums <dev> [<interface>] <devnum[:partnum]>
+
+Description
+-----------
+
+Use the USB Mass Storage class (also known as UMS) to make accessible an U-Boot
+block device (fully or with :ref:`U-Boot's partition syntax <partitions>`)
+to a USB host and to enable file transfers. U-Boot, the USB device, acts as a
+simple external hard drive plugged on the host USB port.
+
+This command "ums" stays in the USB's treatment loop until user enters Ctrl-C.
+
+dev
+ USB gadget device number
+
+interface
+ interface for accessing the block device (mmc, sata, scsi, usb, ....)
+ defaults is "mmc"
+
+devnum
+ device number for selected interface
+
+partnum
+ partition number or 0 to expose all partitions, defaults to 0
+
+Example
+-------
+
+::
+
+ => ums 0 mmc 0
+ => ums 0 usb 1:2
+
+Configuration
+-------------
+
+The ums command is only available if CONFIG_CMD_USB_MASS_STORAGE=y
+and depends on CONFIG_USB_USB_GADGET and CONFIG_BLK.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) when the USB stack was successfully
+started and interrupted, with Ctrl-C or after USB cable issue (detection
+timeout or cable removal).
+
+If an error occurs, the return value $? is set to 1 (false).