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-rw-r--r--arch/arm/dts/am335x-pdu001.dts25
-rw-r--r--arch/arm/dts/dragonboard410c-uboot.dtsi2
-rw-r--r--arch/arm/mach-bcm283x/Kconfig10
-rw-r--r--arch/arm/mach-snapdragon/pinctrl-apq8016.c6
-rw-r--r--arch/x86/cpu/qemu/Kconfig2
-rw-r--r--arch/x86/cpu/quark/Kconfig2
6 files changed, 28 insertions, 19 deletions
diff --git a/arch/arm/dts/am335x-pdu001.dts b/arch/arm/dts/am335x-pdu001.dts
index 3a5e952663..ae43d61f4e 100644
--- a/arch/arm/dts/am335x-pdu001.dts
+++ b/arch/arm/dts/am335x-pdu001.dts
@@ -1,4 +1,3 @@
-// SPDX-License-Identifier: GPL-2.0+
/*
* pdu001.dts
*
@@ -7,6 +6,8 @@
* Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
*
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@@ -17,7 +18,7 @@
/ {
model = "EETS,PDU001";
- compatible = "eets,pdu001", "ti,am33xx";
+ compatible = "ti,am33xx";
chosen {
stdout-path = &uart3;
@@ -303,12 +304,12 @@
clock-frequency = <100000>;
board_24aa025e48: board_24aa025e48@50 {
- compatible = "microchip,24aa025e48";
+ compatible = "atmel,24c02";
reg = <0x50>;
};
backplane_24aa025e48: backplane_24aa025e48@53 {
- compatible = "microchip,24aa025e48";
+ compatible = "atmel,24c02";
reg = <0x53>;
};
@@ -372,8 +373,8 @@
ti,pindir-d0-out-d1-in;
status = "okay";
- cfaf240320a032t {
- compatible = "orise,otm3225a";
+ display-controller@0 {
+ compatible = "orisetech,otm3225a";
reg = <0>;
spi-max-frequency = <1000000>;
// SPI mode 3
@@ -532,16 +533,24 @@
pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>;
status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ };
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
+ phy-handle = <&ethphy0>;
phy-mode = "mii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <1>;
+ phy-handle = <&ethphy1>;
phy-mode = "mii";
dual_emac_res_vlan = <2>;
};
diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi b/arch/arm/dts/dragonboard410c-uboot.dtsi
index a07c97e811..9c1be2566f 100644
--- a/arch/arm/dts/dragonboard410c-uboot.dtsi
+++ b/arch/arm/dts/dragonboard410c-uboot.dtsi
@@ -28,8 +28,8 @@
serial@78b0000 {
u-boot,dm-pre-reloc;
- };
};
+ };
};
diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
index 821caedbf7..3eb5a9a897 100644
--- a/arch/arm/mach-bcm283x/Kconfig
+++ b/arch/arm/mach-bcm283x/Kconfig
@@ -41,7 +41,7 @@ config TARGET_RPI
support BCM2836/BCM2837-based Raspberry Pis such as the RPi 2 and
RPi 3 due to different peripheral address maps.
- This option creates a build targetting the ARM1176 ISA.
+ This option creates a build targeting the ARM1176 ISA.
select BCM2835
config TARGET_RPI_0_W
@@ -57,7 +57,7 @@ config TARGET_RPI_0_W
This is required for U-Boot to operate correctly, even if you only
care about the HDMI/usbkbd console.
- This option creates a build targetting the ARMv7/AArch32 ISA.
+ This option creates a build targeting the ARMv7/AArch32 ISA.
select BCM2835
config TARGET_RPI_2
@@ -80,7 +80,7 @@ config TARGET_RPI_2
arm_loader: emmc clock depends on core clock See:
https://github.com/raspberrypi/firmware/issues/572".
- This option creates a build targetting the ARMv7/AArch32 ISA.
+ This option creates a build targeting the ARMv7/AArch32 ISA.
select BCM2836
config TARGET_RPI_3_32B
@@ -96,7 +96,7 @@ config TARGET_RPI_3_32B
required for U-Boot to operate correctly, even if you only care
about the HDMI/usbkbd console.
- This option creates a build targetting the ARMv7/AArch32 ISA.
+ This option creates a build targeting the ARMv7/AArch32 ISA.
select BCM2837_32B
config TARGET_RPI_3
@@ -124,7 +124,7 @@ config TARGET_RPI_3
duplicated here. The VC FW enhancement is tracked in
https://github.com/raspberrypi/firmware/issues/579.
- This option creates a build targetting the ARMv8/AArch64 ISA.
+ This option creates a build targeting the ARMv8/AArch64 ISA.
select BCM2837_64B
endchoice
diff --git a/arch/arm/mach-snapdragon/pinctrl-apq8016.c b/arch/arm/mach-snapdragon/pinctrl-apq8016.c
index bdb755d0e4..1042b564c3 100644
--- a/arch/arm/mach-snapdragon/pinctrl-apq8016.c
+++ b/arch/arm/mach-snapdragon/pinctrl-apq8016.c
@@ -39,11 +39,11 @@ static const char *apq8016_get_function_name(struct udevice *dev,
static const char *apq8016_get_pin_name(struct udevice *dev,
unsigned int selector)
{
- if (selector < 130) {
+ if (selector < 122) {
snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
return pin_name;
} else {
- return msm_pinctrl_pins[selector - 130];
+ return msm_pinctrl_pins[selector - 122];
}
}
@@ -53,7 +53,7 @@ static unsigned int apq8016_get_function_mux(unsigned int selector)
}
struct msm_pinctrl_data apq8016_data = {
- .pin_count = 140,
+ .pin_count = 133,
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = apq8016_get_function_name,
.get_function_mux = apq8016_get_function_mux,
diff --git a/arch/x86/cpu/qemu/Kconfig b/arch/x86/cpu/qemu/Kconfig
index fdf558d660..f8f2f64730 100644
--- a/arch/x86/cpu/qemu/Kconfig
+++ b/arch/x86/cpu/qemu/Kconfig
@@ -28,7 +28,7 @@ config ACPI_PM1_BASE
hex
default 0xe400
help
- ACPI Power Managment 1 (PM1) i/o-mapped base address.
+ ACPI Power Management 1 (PM1) i/o-mapped base address.
This device is defined in ACPI specification, with 16 bytes in size.
endif
diff --git a/arch/x86/cpu/quark/Kconfig b/arch/x86/cpu/quark/Kconfig
index 3a18cb0dfc..430cce184d 100644
--- a/arch/x86/cpu/quark/Kconfig
+++ b/arch/x86/cpu/quark/Kconfig
@@ -84,7 +84,7 @@ config ACPI_PM1_BASE
hex
default 0x1000
help
- ACPI Power Managment 1 (PM1) i/o-mapped base address.
+ ACPI Power Management 1 (PM1) i/o-mapped base address.
This device is defined in ACPI specification, with 16 bytes in size.
config ACPI_PBLK_BASE