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-rw-r--r--arch/arm/dts/ast2600-evb.dts68
-rw-r--r--arch/arm/dts/ast2600.dtsi46
-rw-r--r--arch/arm/dts/s700-u-boot.dtsi10
-rw-r--r--arch/arm/dts/s700.dtsi17
4 files changed, 135 insertions, 6 deletions
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index 05362d19bd..c17988ec3c 100644
--- a/arch/arm/dts/ast2600-evb.dts
+++ b/arch/arm/dts/ast2600-evb.dts
@@ -163,6 +163,74 @@
pinctrl-0 = <&pinctrl_i2c9_default>;
};
+&mdio0 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&mdio1 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy1: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&mdio2 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy2: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&mdio3 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy3: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&mac0 {
+ status = "okay";
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&ethphy0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii1_default>;
+};
+
+&mac1 {
+ status = "okay";
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&ethphy1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii2_default>;
+};
+
+&mac2 {
+ status = "okay";
+ phy-mode = "rgmii";
+ phy-handle = <&ethphy2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii3_default>;
+};
+
+&mac3 {
+ status = "okay";
+ phy-mode = "rgmii";
+ phy-handle = <&ethphy3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii4_default>;
+};
+
&scu {
mac0-clk-delay = <0x1d 0x1c
0x10 0x17
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index 31905fd208..98840ce7b0 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -210,11 +210,47 @@
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
};
- mdio: ethernet@1e650000 {
- compatible = "aspeed,aspeed-mdio";
- reg = <0x1e650000 0x40>;
- resets = <&rst ASPEED_RESET_MII>;
- status = "disabled";
+ mdio: bus@1e650000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x1e650000 0x100>;
+
+ mdio0: mdio@0 {
+ compatible = "aspeed,ast2600-mdio";
+ reg = <0 0x8>;
+ resets = <&rst ASPEED_RESET_MII>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio1_default>;
+ status = "disabled";
+ };
+
+ mdio1: mdio@8 {
+ compatible = "aspeed,ast2600-mdio";
+ reg = <0x8 0x8>;
+ resets = <&rst ASPEED_RESET_MII>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio2_default>;
+ status = "disabled";
+ };
+
+ mdio2: mdio@10 {
+ compatible = "aspeed,ast2600-mdio";
+ reg = <0x10 0x8>;
+ resets = <&rst ASPEED_RESET_MII>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio3_default>;
+ status = "disabled";
+ };
+
+ mdio3: mdio@18 {
+ compatible = "aspeed,ast2600-mdio";
+ reg = <0x18 0x8>;
+ resets = <&rst ASPEED_RESET_MII>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio4_default>;
+ status = "disabled";
+ };
};
mac0: ftgmac@1e660000 {
diff --git a/arch/arm/dts/s700-u-boot.dtsi b/arch/arm/dts/s700-u-boot.dtsi
index 1b2768272c..3c3396bccf 100644
--- a/arch/arm/dts/s700-u-boot.dtsi
+++ b/arch/arm/dts/s700-u-boot.dtsi
@@ -19,6 +19,16 @@
status = "okay";
};
+ mmc0: mmc@e0210000 {
+ compatible = "actions,s700-mmc", "actions,owl-mmc";
+ reg = <0x0 0xe0210000 0x0 0x4000>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu CLK_SD0>;
+ dmas = <&dma 2>;
+ dma-names = "mmc";
+ bus-width = <4>;
+ status = "okay";
+ };
};
};
diff --git a/arch/arm/dts/s700.dtsi b/arch/arm/dts/s700.dtsi
index 2006ad5424..2c78caebf5 100644
--- a/arch/arm/dts/s700.dtsi
+++ b/arch/arm/dts/s700.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/clock/actions,s700-cmu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/owl-s700-powergate.h>
#include <dt-bindings/reset/actions,s700-reset.h>
/ {
@@ -231,7 +232,7 @@
pinctrl: pinctrl@e01b0000 {
compatible = "actions,s700-pinctrl";
- reg = <0x0 0xe01b0000 0x0 0x1000>;
+ reg = <0x0 0xe01b0000 0x0 0x100>;
clocks = <&cmu CLK_GPIO>;
gpio-controller;
gpio-ranges = <&pinctrl 0 0 136>;
@@ -244,5 +245,19 @@
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ dma: dma-controller@e0230000 {
+ compatible = "actions,s700-dma";
+ reg = <0x0 0xe0230000 0x0 0x1000>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ dma-channels = <10>;
+ dma-requests = <44>;
+ clocks = <&cmu CLK_DMAC>;
+ power-domains = <&sps S700_PD_DMA>;
+ };
};
};