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Diffstat (limited to 'arch/arm/include/asm/arch-sunxi')
-rw-r--r--arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h
index 54c4755556..0a1da02376 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h
@@ -9,6 +9,8 @@
#ifndef _SUNXI_DRAM_SUN50I_H6_H
#define _SUNXI_DRAM_SUN50I_H6_H
+#include <stdbool.h>
+
enum sunxi_dram_type {
SUNXI_DRAM_TYPE_DDR3 = 3,
SUNXI_DRAM_TYPE_DDR4,
@@ -16,6 +18,11 @@ enum sunxi_dram_type {
SUNXI_DRAM_TYPE_LPDDR3,
};
+static inline bool sunxi_dram_is_lpddr(int type)
+{
+ return type >= SUNXI_DRAM_TYPE_LPDDR2;
+}
+
/*
* The following information is mainly retrieved by disassembly and some FPGA
* test code of sun50iw3 platform.
@@ -286,6 +293,7 @@ check_member(sunxi_mctl_phy_reg, dx[3].reserved_0xf0, 0xaf0);
#define DCR_DDR3 (3 << 0)
#define DCR_DDR4 (4 << 0)
#define DCR_DDR8BANK BIT(3)
+#define DCR_DDR2T BIT(28)
/*
* The delay parameters allow to allegedly specify delay times of some