diff options
Diffstat (limited to 'arch/arm/dts/imx8mn-venice-gw7902.dts')
| -rw-r--r-- | arch/arm/dts/imx8mn-venice-gw7902.dts | 80 |
1 files changed, 61 insertions, 19 deletions
diff --git a/arch/arm/dts/imx8mn-venice-gw7902.dts b/arch/arm/dts/imx8mn-venice-gw7902.dts index d026d96558..367a232675 100644 --- a/arch/arm/dts/imx8mn-venice-gw7902.dts +++ b/arch/arm/dts/imx8mn-venice-gw7902.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2022 Gateworks Corporation + * Copyright 2021 Gateworks Corporation */ /dts-v1/; @@ -140,12 +140,13 @@ regulator-name = "3P3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + regulator-always-on; }; reg_usb1_vbus: regulator-usb1 { + compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reg_usb1>; - compatible = "regulator-fixed"; regulator-name = "usb_usb1_vbus"; gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>; enable-active-high; @@ -154,9 +155,9 @@ }; reg_wifi: regulator-wifi { + compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reg_wl>; - compatible = "regulator-fixed"; regulator-name = "wifi"; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high; @@ -219,6 +220,10 @@ }; }; +&disp_blk_ctrl { + status = "disabled"; +}; + /* off-board header */ &ecspi2 { pinctrl-names = "default"; @@ -242,18 +247,55 @@ ethphy0: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; - /* TI DP83867 props */ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; - /* GPY111 props */ - rx-internal-delay-ps = <2000>; - tx-internal-delay-ps = <2500>; }; }; }; +&gpio1 { + gpio-line-names = "", "", "", "", "", "", "", "", + "", "", "", "", "", "m2_reset", "", "m2_wdis#", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpio2 { + gpio-line-names = "", "", "", "", "", "", "", "", + "uart2_en#", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpio3 { + gpio-line-names = "", "m2_gdis#", "", "", "", "", "", "m2_off#", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpio4 { + gpio-line-names = "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "app_gpio1", "", "uart1_rs485", + "", "uart1_term", "uart1_half", "app_gpio2", + "mipi_gpio1", "", "", ""; +}; + +&gpio5 { + gpio-line-names = "", "", "", "mipi_gpio4", + "mipi_gpio3", "mipi_gpio2", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpu { + status = "disabled"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -529,20 +571,15 @@ status = "okay"; accelerometer@19 { + compatible = "st,lis2de12"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_accel>; - compatible = "st,lis2de12"; reg = <0x19>; st,drdy-int-pin = <1>; interrupt-parent = <&gpio1>; interrupts = <12 IRQ_TYPE_LEVEL_LOW>; interrupt-names = "INT1"; }; - - secure-element@60 { - compatible = "nxp,se050"; - reg = <0x60>; - }; }; /* off-board header */ @@ -561,6 +598,10 @@ status = "okay"; }; +&pgc_gpumix { + status = "disabled"; +}; + /* off-board header */ &sai3 { pinctrl-names = "default"; @@ -591,6 +632,7 @@ pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + uart-has-rtscts; status = "okay"; bluetooth { @@ -648,7 +690,7 @@ pinctrl_hog: hoggrp { fsl,pins = < MX8MN_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */ - MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RST# */ + MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RESET */ MX8MN_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */ MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */ MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */ @@ -726,11 +768,11 @@ pinctrl_gpio_leds: gpioledgrp { fsl,pins = < - MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x40000019 - MX8MN_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x40000019 - MX8MN_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x40000019 - MX8MN_IOMUXC_SAI5_RXC_GPIO3_IO20 0x40000019 - MX8MN_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x40000019 + MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x19 + MX8MN_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x19 + MX8MN_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x19 + MX8MN_IOMUXC_SAI5_RXC_GPIO3_IO20 0x19 + MX8MN_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19 >; }; |