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-rw-r--r--arch/mips/Kconfig19
-rw-r--r--arch/mips/lib/cache.c2
2 files changed, 12 insertions, 9 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index c97ea4156b..77d1ac65d2 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -221,6 +221,16 @@ config ROM_EXCEPTION_VECTORS
Disable this, if the U-Boot image is booted from DRAM (e.g. by SPL).
In that case the image size will be reduced by 0x500 bytes.
+config MIPS_CM_BASE
+ hex "MIPS CM GCR Base Address"
+ depends on MIPS_CM
+ default 0x1fbf8000
+ help
+ The physical base address at which to map the MIPS Coherence Manager
+ Global Configuration Registers (GCRs). This should be set such that
+ the GCRs occupy a region of the physical address space which is
+ otherwise unused, or at minimum that software doesn't need to access.
+
endmenu
menu "OS boot interface"
@@ -393,15 +403,6 @@ config MIPS_CM
wish U-Boot to configure it or make use of it to retrieve system
information such as cache configuration.
-config MIPS_CM_BASE
- hex
- default 0x1fbf8000
- help
- The physical base address at which to map the MIPS Coherence Manager
- Global Configuration Registers (GCRs). This should be set such that
- the GCRs occupy a region of the physical address space which is
- otherwise unused, or at minimum that software doesn't need to access.
-
endif
endmenu
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index bd14ba6ea7..91b037f87d 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -7,7 +7,9 @@
#include <common.h>
#include <asm/cacheops.h>
+#ifdef CONFIG_MIPS_L2_CACHE
#include <asm/cm.h>
+#endif
#include <asm/mipsregs.h>
DECLARE_GLOBAL_DATA_PTR;