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-rw-r--r--arch/arm/dts/socfpga_arria5_secu1.dts6
-rw-r--r--configs/socfpga_secu1_defconfig5
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_arria5_secu1.dts b/arch/arm/dts/socfpga_arria5_secu1.dts
index dadf766682..820e29ad6d 100644
--- a/arch/arm/dts/socfpga_arria5_secu1.dts
+++ b/arch/arm/dts/socfpga_arria5_secu1.dts
@@ -31,6 +31,12 @@
spi0 = &spi1;
};
+ bootcount@0 {
+ compatible = "u-boot,bootcount-rtc";
+ rtc = <&rtc>;
+ offset = <0x9e>;
+ };
+
i2c_gpio: i2c@0 {
compatible = "i2c-gpio";
#address-cells = <1>;
diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig
index 230959ec86..fcb38f1a41 100644
--- a/configs/socfpga_secu1_defconfig
+++ b/configs/socfpga_secu1_defconfig
@@ -48,6 +48,9 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SPL_DM_SEQ_ALIAS=y
# CONFIG_SPL_BLK is not set
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_DM_BOOTCOUNT=y
+CONFIG_DM_BOOTCOUNT_RTC=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -76,6 +79,8 @@ CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_DM_RESET=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_M41T62=y
CONFIG_SPI=y
CONFIG_SPI_MEM=y
CONFIG_DESIGNWARE_SPI=y