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| author | Boris Brezillon <boris.brezillon@bootlin.com> | 2018-08-16 17:30:11 +0200 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-09-20 20:10:49 +0530 |
| commit | d13f5b254a43e292814a618f60a2696ba01267a7 (patch) | |
| tree | 2d565b6e4249c7c4d7ce3de6a26ba0bc0b39c733 /include/spi.h | |
| parent | f86787280b37e381f8d82f48583434d62dd16e27 (diff) | |
| download | u-boot-d13f5b254a43e292814a618f60a2696ba01267a7.tar.gz | |
spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in general.
This is an attempt at defining a SPI memory interface which works for
all kinds of SPI memories (NORs, NANDs, SRAMs).
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'include/spi.h')
| -rw-r--r-- | include/spi.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/include/spi.h b/include/spi.h index 9754c53aa1..938627bc01 100644 --- a/include/spi.h +++ b/include/spi.h @@ -9,6 +9,8 @@ #ifndef _SPI_H_ #define _SPI_H_ +#include <common.h> + /* SPI mode flags */ #define SPI_CPHA BIT(0) /* clock phase */ #define SPI_CPOL BIT(1) /* clock polarity */ @@ -403,6 +405,15 @@ struct dm_spi_ops { void *din, unsigned long flags); /** + * Optimized handlers for SPI memory-like operations. + * + * Optimized/dedicated operations for interactions with SPI memory. This + * field is optional and should only be implemented if the controller + * has native support for memory like operations. + */ + const struct spi_controller_mem_ops *mem_ops; + + /** * Set transfer speed. * This sets a new speed to be applied for next spi_xfer(). * @bus: The SPI bus |