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authorAngelo Dureghello <angelo@sysam.it>2019-03-13 21:46:47 +0100
committerTom Rini <trini@konsulko.com>2019-05-24 08:11:57 -0400
commit5ea3766461dd3d317aa2388fbc3b51e0861b09cd (patch)
tree10536251277e0abc3a88e67c7958aea1b6250b77 /include/dm
parent610e316d02c6d8a423a9426e4a12b357ef586d32 (diff)
downloadu-boot-5ea3766461dd3d317aa2388fbc3b51e0861b09cd.tar.gz
drivers: spi: cf_spi: convert to driver model
Converting to driver model and removes non-dm code. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Diffstat (limited to 'include/dm')
-rw-r--r--include/dm/platform_data/spi_coldfire.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/include/dm/platform_data/spi_coldfire.h b/include/dm/platform_data/spi_coldfire.h
new file mode 100644
index 0000000000..8ad8eaedfd
--- /dev/null
+++ b/include/dm/platform_data/spi_coldfire.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2018 Angelo Dureghello <angelo@sysam.it>
+ */
+
+#ifndef __spi_coldfire_h
+#define __spi_coldfire_h
+
+#define MAX_CTAR_REGS 8
+#define MAX_CTAR_FIELDS 8
+
+/*
+ * struct coldfire_spi_platdata - information about a coldfire spi module
+ *
+ * @regs_addr: base address for module registers
+ * @speed_hz: default SCK frequency
+ * @mode: default SPI mode
+ * @num_cs: number of DSPI chipselect signals
+ */
+struct coldfire_spi_platdata {
+ fdt_addr_t regs_addr;
+ uint speed_hz;
+ uint mode;
+ uint num_cs;
+ uint ctar[MAX_CTAR_REGS][MAX_CTAR_FIELDS];
+};
+
+#endif /* __spi_coldfire_h */
+