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authorPali Rohár <pali@kernel.org>2021-07-31 14:22:52 +0200
committerStefan Roese <sr@denx.de>2021-08-11 08:42:26 +0200
commit29795302b942e6ee41c9d95f7e6e29f57d108d42 (patch)
tree7b13994c6545e80bcf5ed4ccba3e34620e49bd68 /include/dm-demo.h
parent293a8de6fa0fdc70f6de6d7fb8d70d46e342e42c (diff)
downloadu-boot-29795302b942e6ee41c9d95f7e6e29f57d108d42.tar.gz
arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register
Bit 15 in SAR register specifies if TCLK is running at 200 MHz or 250 MHz. Use this information instead of manual configuration in every board file. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
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