diff options
author | York Sun <york.sun@nxp.com> | 2016-12-28 08:43:45 -0800 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2017-01-04 19:40:52 -0500 |
commit | 51370d561842ae7438337e77a93177e13796ac45 (patch) | |
tree | da97bb17019e198360bd99d81e9d98a533c014b4 /include/configs | |
parent | 66e399b68d20d96a90ba391d75c2290bd63bf4a5 (diff) | |
download | u-boot-51370d561842ae7438337e77a93177e13796ac45.tar.gz |
ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/B4860QDS.h | 2 | ||||
-rw-r--r-- | include/configs/P2041RDB.h | 2 | ||||
-rw-r--r-- | include/configs/T102xQDS.h | 2 | ||||
-rw-r--r-- | include/configs/T102xRDB.h | 2 | ||||
-rw-r--r-- | include/configs/T1040QDS.h | 2 | ||||
-rw-r--r-- | include/configs/T104xRDB.h | 2 | ||||
-rw-r--r-- | include/configs/T208xQDS.h | 2 | ||||
-rw-r--r-- | include/configs/T208xRDB.h | 2 | ||||
-rw-r--r-- | include/configs/T4240RDB.h | 2 | ||||
-rw-r--r-- | include/configs/corenet_ds.h | 2 | ||||
-rw-r--r-- | include/configs/cyrus.h | 2 | ||||
-rw-r--r-- | include/configs/km/kmp204x-common.h | 2 | ||||
-rw-r--r-- | include/configs/t4qds.h | 2 |
13 files changed, 13 insertions, 13 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index e5c220e4d9..3ad9f80ce1 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -62,7 +62,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 9c389d4739..3cd5c3c613 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -40,7 +40,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index ea1c5e23dc..c9a1334ca5 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -22,7 +22,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 12b7039372..36eba4ec2c 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -22,7 +22,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index dcdba5fb65..8d6d986a49 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -53,7 +53,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI_INDIRECT_BRIDGE diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 331d4259eb..d574bbbef2 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -164,7 +164,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI_INDIRECT_BRIDGE diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 14356d0906..210d8d8343 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -32,7 +32,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 325080f467..19411885b9 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -26,7 +26,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 52f0d47535..e15b0ea88b 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -72,7 +72,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 115df2a0cd..c9c00c5388 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -58,7 +58,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index d1b85474aa..14e207e935 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -48,7 +48,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 22194f99ed..b4cdb67a51 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -34,7 +34,7 @@ #define CONFIG_MP /* support multiple processors */ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index e82df3393c..0f59eb1c17 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -25,7 +25,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ |