diff options
| author | Padmarao Begari <padmarao.begari@microchip.com> | 2021-01-15 08:20:40 +0530 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2021-01-18 11:06:38 +0800 |
| commit | 64413e1b7caf080e4b6bfb58447219c201de48cb (patch) | |
| tree | dd807020aeeebf501b046489e4159e1f6e3fe9d9 /include/configs/microchip_mpfs_icicle.h | |
| parent | dd4ee416a6b90497aadf1f25d0d5b09558344917 (diff) | |
| download | u-boot-64413e1b7caf080e4b6bfb58447219c201de48cb.tar.gz | |
riscv: Add Microchip MPFS Icicle Kit support
This patch adds Microchip MPFS Icicle Kit support. For now, only
NS16550 Serial, Microchip clock, Cadence eMMC and MACB drivers are
enabled. The Microchip MPFS Icicle defconfig by default builds
U-Boot for S-Mode because U-Boot on Microchip PolarFire SoC will run
in S-Mode as payload of HSS + OpenSBI.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Diffstat (limited to 'include/configs/microchip_mpfs_icicle.h')
| -rw-r--r-- | include/configs/microchip_mpfs_icicle.h | 59 |
1 files changed, 20 insertions, 39 deletions
diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h index 8a7470545b..24990370cf 100644 --- a/include/configs/microchip_mpfs_icicle.h +++ b/include/configs/microchip_mpfs_icicle.h @@ -7,53 +7,34 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * CPU and Board Configuration Options - */ +#include <linux/sizes.h> -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) -/* - * Print Buffer Size - */ -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) -/* - * max number of command args - */ -#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_MALLOC_LEN SZ_8M -/* - * Boot Argument Buffer Size - */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -/* - * Size of malloc() pool - * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough - */ -#define CONFIG_SYS_MALLOC_LEN (512 << 10) +#define CONFIG_SYS_BOOTM_LEN SZ_64M -/* - * Physical Memory Map - */ -#define PHYS_SDRAM_0 0x80000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_0_SIZE 0x40000000 /* 1 GB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 +#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 -/* Init Stack Pointer */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x200000) +/* Environment options */ -#define CONFIG_SYS_LOAD_ADDR 0x80000000 /* SDRAM */ +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(DHCP, dhcp, na) -/* - * memtest works on DRAM - */ +#include <config_distro_bootcmd.h> -/* When we use RAM as ENV */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootm_size=0x10000000\0" \ + "kernel_addr_r=0x84000000\0" \ + "fdt_addr_r=0x88000000\0" \ + "scriptaddr=0x88100000\0" \ + "pxefile_addr_r=0x88200000\0" \ + "ramdisk_addr_r=0x88300000\0" \ + BOOTENV #endif /* __CONFIG_H */ |