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authorChee Hong Ang <chee.hong.ang@intel.com>2020-08-05 21:15:57 +0800
committerLey Foon Tan <ley.foon.tan@intel.com>2020-10-09 17:53:11 +0800
commitb3e2d9fccbe7390a859f7f46001c6312cc35455c (patch)
tree54fb5133a8eb0b7a9fb7d1c4377ec2c825c70764 /include/MCD_dma.h
parentd7a1ff40d6006c818c9e74d3e13bec008638349f (diff)
downloadu-boot-b3e2d9fccbe7390a859f7f46001c6312cc35455c.tar.gz
arm: socfpga: soc64: Show reset state in SPL
Print reset state (warm/cold) together with the source (watchdog/MPU) which has triggered the warm reset on S10 & Agilex. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'include/MCD_dma.h')
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