diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2023-03-27 11:11:40 +0300 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2023-04-07 18:24:42 +0200 |
| commit | 8dfeee651fc13c8fd797998e9a408a8b49bead09 (patch) | |
| tree | d3f48f22b78d7045f4f44d94cbb638461c56f4fb /drivers/video | |
| parent | 67a36465216a292240b8b0ae088dd1ee7223029a (diff) | |
| download | u-boot-8dfeee651fc13c8fd797998e9a408a8b49bead09.tar.gz | |
tegra: lcd: video: integrate display driver for t30
On popular request make the display driver from T20 work on T30 as
well. Turned out to be quite straight forward. However a few notes
about some things encountered during porting: Of course the T30 device
tree was completely missing host1x as well as PWM support but it turns
out this can simply be copied from T20. The only trouble compiling the
Tegra video driver for T30 had to do with some hard-coded PWM pin
muxing for T20 which is quite ugly anyway. On T30 this gets handled by
a board specific complete pin muxing table. The older Chromium U-Boot
2011.06 which to my knowledge was the only prior attempt at enabling a
display driver for T30 for whatever reason got some clocking stuff
mixed up. Turns out at least for a single display controller T20 and
T30 can be clocked quite similar. Enjoy.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Surface RT T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/tegra.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c index 3f9fcd0403..5e3f6bf029 100644 --- a/drivers/video/tegra.c +++ b/drivers/video/tegra.c @@ -40,8 +40,8 @@ struct tegra_lcd_priv { enum { /* Maximum LCD size we support */ - LCD_MAX_WIDTH = 1366, - LCD_MAX_HEIGHT = 768, + LCD_MAX_WIDTH = 1920, + LCD_MAX_HEIGHT = 1200, LCD_MAX_LOG2_BPP = VIDEO_BPP16, }; @@ -307,14 +307,19 @@ static int tegra_lcd_probe(struct udevice *dev) int ret; /* Initialize the Tegra display controller */ +#ifdef CONFIG_TEGRA20 funcmux_select(PERIPH_ID_DISP1, FUNCMUX_DEFAULT); +#endif + if (tegra_display_probe(blob, priv, (void *)plat->base)) { printf("%s: Failed to probe display driver\n", __func__); return -1; } +#ifdef CONFIG_TEGRA20 pinmux_set_func(PMUX_PINGRP_GPU, PMUX_FUNC_PWM); pinmux_tristate_disable(PMUX_PINGRP_GPU); +#endif ret = panel_enable_backlight(priv->panel); if (ret) { @@ -414,6 +419,7 @@ static const struct video_ops tegra_lcd_ops = { static const struct udevice_id tegra_lcd_ids[] = { { .compatible = "nvidia,tegra20-dc" }, + { .compatible = "nvidia,tegra30-dc" }, { } }; |