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authorSimon Glass <sjg@chromium.org>2017-06-12 06:21:56 -0600
committerSimon Glass <sjg@chromium.org>2017-07-11 10:08:20 -0600
commitdb9f8f6ad5718909c57aee9a9f476309ac790e1f (patch)
tree8932776c390e660c0dc1dafa053bdb154c706131 /drivers/serial
parent03bc3f18b77a3d3157ef7faa4533c7303ea78a80 (diff)
downloadu-boot-db9f8f6ad5718909c57aee9a9f476309ac790e1f.tar.gz
dm: serial: ns16550: Convert to livetree
Update this driver to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/ns16550.c15
1 files changed, 5 insertions, 10 deletions
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 52c52c1ad1..330c5e186a 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -8,7 +8,6 @@
#include <clk.h>
#include <dm.h>
#include <errno.h>
-#include <fdtdec.h>
#include <ns16550.h>
#include <serial.h>
#include <watchdog.h>
@@ -395,7 +394,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
int err;
/* try Processor Local Bus device first */
- addr = devfdt_get_addr(dev);
+ addr = dev_read_addr(dev);
#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
if (addr == FDT_ADDR_T_NONE) {
/* then try pci device */
@@ -434,11 +433,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
#endif
- plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "reg-offset", 0);
- plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "reg-shift", 0);
-
+ plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
+ plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
err = clk_get_by_index(dev, 0, &clk);
if (!err) {
err = clk_get_rate(&clk);
@@ -450,9 +446,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
}
if (!plat->clock)
- plat->clock = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "clock-frequency",
- CONFIG_SYS_NS16550_CLK);
+ plat->clock = dev_read_u32_default(dev, "clock-frequency",
+ CONFIG_SYS_NS16550_CLK);
if (!plat->clock) {
debug("ns16550 clock not defined\n");
return -EINVAL;