diff options
author | Rick Chen <rickchen36@gmail.com> | 2017-11-23 10:22:17 +0800 |
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committer | Rick Chen <rickchen36@gmail.com> | 2017-11-30 09:39:12 +0800 |
commit | 410d129e8c68b994dee69c89dd8e52931458ff85 (patch) | |
tree | 810d57e59f87a0332d385b4a977bd10e969f3e95 /doc/device-tree-bindings/timer | |
parent | c6c85dc87d2ca044458429cb2b61c0dcaea9b7d6 (diff) | |
download | u-boot-410d129e8c68b994dee69c89dd8e52931458ff85.tar.gz |
dt-bindings: timer: Add andestech atcpit100 timer
Add a document to describe Andestech atcpit100 timer and
binding information.
Signed-off-by: rick <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc/device-tree-bindings/timer')
-rw-r--r-- | doc/device-tree-bindings/timer/atcpit100_timer.txt | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/timer/atcpit100_timer.txt b/doc/device-tree-bindings/timer/atcpit100_timer.txt new file mode 100644 index 0000000000..620814e948 --- /dev/null +++ b/doc/device-tree-bindings/timer/atcpit100_timer.txt @@ -0,0 +1,31 @@ +Andestech ATCPIT100 timer +------------------------------------------------------------------ +ATCPIT100 is a generic IP block from Andes Technology, embedded in +Andestech AE3XX, AE250 platforms and other designs. + +This timer is a set of compact multi-function timers, which can be +used as pulse width modulators (PWM) as well as simple timers. + +It supports up to 4 PIT channels. Each PIT channel is a +multi-function timer and provide the following usage scenarios: +One 32-bit timer +Two 16-bit timers +Four 8-bit timers +One 16-bit PWM +One 16-bit timer and one 8-bit PWM +Two 8-bit timer and one 8-bit PWM + +Required properties: +- compatible : Should be "andestech,atcpit100" +- reg : Address and length of the register set +- interrupts : Reference to the timer interrupt +- clock-frequency : The rate in HZ in input of the Andestech ATCPIT100 timer + +Examples: + +timer0: timer@f0400000 { + compatible = "andestech,atcpit100"; + reg = <0xf0400000 0x1000>; + interrupts = <2 4>; + clock-frequency = <30000000>; +}: |