diff options
author | Tom Rini <trini@konsulko.com> | 2018-12-03 07:26:16 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2018-12-03 07:26:16 -0500 |
commit | e54457f7495e6fe527d1bad0d8cc7b717558a759 (patch) | |
tree | 5fe3560f24686a1152053805b3555c7423d52271 /board | |
parent | 952061352acfd24034e6990b6b7d32cded020c0a (diff) | |
parent | 6ef705b1575045f7b63bf011a0774228159715b2 (diff) | |
download | u-boot-e54457f7495e6fe527d1bad0d8cc7b717558a759.tar.gz |
Merge tag 'arc-updates-for-2019.01-rc1' of git://git.denx.de/u-boot-arc
We introduce much better automatic identification of ARC cores.
1. Try to match found HW features to known ARC core templates
2. Print CPU frequency for all ARC boards
3. Add more board-specific info
Diffstat (limited to 'board')
-rw-r--r-- | board/synopsys/axs10x/axs10x.c | 8 | ||||
-rw-r--r-- | board/synopsys/emsdp/emsdp.c | 70 | ||||
-rw-r--r-- | board/synopsys/hsdk/hsdk.c | 8 | ||||
-rw-r--r-- | board/synopsys/iot_devkit/iot_devkit.c | 10 |
4 files changed, 69 insertions, 27 deletions
diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c index c95f7af7a7..ffa7c154b5 100644 --- a/board/synopsys/axs10x/axs10x.c +++ b/board/synopsys/axs10x/axs10x.c @@ -109,3 +109,11 @@ void smp_kick_all_cpus(void) writel(cmd, (void __iomem *)AXC003_CREG_CPU_START); } #endif + +int checkboard(void) +{ + printf("Board: ARC Software Development Platform AXS%s\n", + is_isa_arcv2() ? "103" : "101"); + + return 0; +}; diff --git a/board/synopsys/emsdp/emsdp.c b/board/synopsys/emsdp/emsdp.c index b5ec7f17ec..c0770b58c1 100644 --- a/board/synopsys/emsdp/emsdp.c +++ b/board/synopsys/emsdp/emsdp.c @@ -7,10 +7,46 @@ #include <dwmmc.h> #include <malloc.h> +#include <asm/arcregs.h> + DECLARE_GLOBAL_DATA_PTR; -#define ARC_PERIPHERAL_BASE 0xF0000000 -#define SDIO_BASE (ARC_PERIPHERAL_BASE + 0x10000) +#define ARC_PERIPHERAL_BASE 0xF0000000 + +#define CGU_ARC_FMEAS_ARC (void *)(ARC_PERIPHERAL_BASE + 0x84) +#define CGU_ARC_FMEAS_ARC_START BIT(31) +#define CGU_ARC_FMEAS_ARC_DONE BIT(30) +#define CGU_ARC_FMEAS_ARC_CNT_MASK GENMASK(14, 0) +#define CGU_ARC_FMEAS_ARC_RCNT_OFFSET 0 +#define CGU_ARC_FMEAS_ARC_FCNT_OFFSET 15 + +#define SDIO_BASE (void *)(ARC_PERIPHERAL_BASE + 0x10000) + +int mach_cpu_init(void) +{ + int rcnt, fcnt; + u32 data; + + /* Start frequency measurement */ + writel(CGU_ARC_FMEAS_ARC_START, CGU_ARC_FMEAS_ARC); + + /* Poll DONE bit */ + do { + data = readl(CGU_ARC_FMEAS_ARC); + } while (!(data & CGU_ARC_FMEAS_ARC_DONE)); + + /* Amount of reference 100 MHz clocks */ + rcnt = ((data >> CGU_ARC_FMEAS_ARC_RCNT_OFFSET) & + CGU_ARC_FMEAS_ARC_CNT_MASK); + + /* Amount of CPU clocks */ + fcnt = ((data >> CGU_ARC_FMEAS_ARC_FCNT_OFFSET) & + CGU_ARC_FMEAS_ARC_CNT_MASK); + + gd->cpu_clk = ((100 * fcnt) / rcnt) * 1000000; + + return 0; +} int board_mmc_init(bd_t *bis) { @@ -24,7 +60,7 @@ int board_mmc_init(bd_t *bis) memset(host, 0, sizeof(struct dwmci_host)); host->name = "Synopsys Mobile storage"; - host->ioaddr = (void *)SDIO_BASE; + host->ioaddr = SDIO_BASE; host->buswidth = 4; host->dev_index = 0; host->bus_hz = 50000000; @@ -42,31 +78,32 @@ int board_mmc_getcd(struct mmc *mmc) } #define CREG_BASE 0xF0001000 -#define CREG_BOOT_OFFSET 0 -#define CREG_BOOT_WP_OFFSET 8 +#define CREG_BOOT (void *)(CREG_BASE + 0x0FF0) +#define CREG_IP_SW_RESET (void *)(CREG_BASE + 0x0FF0) +#define CREG_IP_VERSION (void *)(CREG_BASE + 0x0FF8) -#define CGU_BASE 0xF0000000 -#define CGU_IP_SW_RESET 0x0FF0 +/* Bits in CREG_BOOT register */ +#define CREG_BOOT_WP_BIT BIT(8) void reset_cpu(ulong addr) { - writel(1, (u32 *)(CGU_BASE + CGU_IP_SW_RESET)); + writel(1, CREG_IP_SW_RESET); while (1) ; /* loop forever till reset */ } static int do_emsdp_rom(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { - u32 creg_boot = readl((u32 *)(CREG_BASE + CREG_BOOT_OFFSET)); + u32 creg_boot = readl(CREG_BOOT); if (!strcmp(argv[1], "unlock")) - creg_boot &= ~BIT(CREG_BOOT_WP_OFFSET); + creg_boot &= ~CREG_BOOT_WP_BIT; else if (!strcmp(argv[1], "lock")) - creg_boot |= BIT(CREG_BOOT_WP_OFFSET); + creg_boot |= CREG_BOOT_WP_BIT; else return CMD_RET_USAGE; - writel(creg_boot, (u32 *)(CREG_BASE + CREG_BOOT_OFFSET)); + writel(creg_boot, CREG_BOOT); return CMD_RET_SUCCESS; } @@ -97,3 +134,12 @@ U_BOOT_CMD( "rom unlock - Unlock non-volatile memory for writing\n" "emsdp rom lock - Lock non-volatile memory to prevent writing\n" ); + +int checkboard(void) +{ + int version = readl(CREG_IP_VERSION); + + printf("Board: ARC EM Software Development Platform v%d.%d\n", + (version >> 16) & 0xff, version & 0xff); + return 0; +}; diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c index b6aefdbe6d..8a2c201477 100644 --- a/board/synopsys/hsdk/hsdk.c +++ b/board/synopsys/hsdk/hsdk.c @@ -1054,10 +1054,8 @@ int board_mmc_init(bd_t *bis) return 0; } -#ifdef CONFIG_DISPLAY_CPUINFO -int print_cpuinfo(void) +int checkboard(void) { - printf("CPU: ARC HS38 v2.1c\n"); + puts("Board: Synopsys ARC HS Development Kit\n"); return 0; -} -#endif /* CONFIG_DISPLAY_CPUINFO */ +}; diff --git a/board/synopsys/iot_devkit/iot_devkit.c b/board/synopsys/iot_devkit/iot_devkit.c index f8838fb3ce..8424e09bd3 100644 --- a/board/synopsys/iot_devkit/iot_devkit.c +++ b/board/synopsys/iot_devkit/iot_devkit.c @@ -189,13 +189,3 @@ int checkboard(void) puts("Board: Synopsys IoT Development Kit\n"); return 0; }; - -#ifdef CONFIG_DISPLAY_CPUINFO -int print_cpuinfo(void) -{ - char mhz[8]; - - printf("CPU: ARC EM9D at %s MHz\n", strmhz(mhz, gd->cpu_clk)); - return 0; -} -#endif /* CONFIG_DISPLAY_CPUINFO */ |