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authorMarek Vasut <marex@denx.de>2022-03-14 13:35:54 +0100
committerPatrice Chotard <patrice.chotard@foss.st.com>2022-03-15 09:20:32 +0100
commit19fbe102b2e21db949a66d9020da097769bbdb3c (patch)
tree5f3216b5e7c8668e6dffd8b8079f5d4e1380c41f /arch
parentb49105320a5b1e6c5f88dd90766d65a79f9f4e65 (diff)
downloadu-boot-19fbe102b2e21db949a66d9020da097769bbdb3c.tar.gz
ARM: dts: stm32: Add DFU support for DHCOM recovery
This patch configures U-Boot SPL for DHCOM SoM to permit DFU upload of SPL and subsequent u-boot.itb for recovery or commissioning purposes. The DFU usage procedure is identical to STM32MP1 DHCOR SoM, see commit 3919aa1722a ("ARM: dts: stm32: Add DFU support for DHCOR recovery") , except for switching the SoM into DFU mode. By default, the DHCOM SoM has no dedicated mechanism for setting BOOTn straps into UART/USB mode, therefore to enter DFU mode, the SoC must fail to boot from boot media which can be selected by the BOOTn strap override mechanism first and then fall back to DFU mode. In case of a SoM with pre-populated BOOTn strap override button, power the system off, remove microSD card (if applicable), hold down the BOOTn strap override button located between eMMC and SoM edge connector, power on the SoM. The SoC will fail to boot from SD card and fall back into DFU mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi42
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index f09f4290f6..d73967ac1b 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -58,6 +58,7 @@
&i2c4 {
u-boot,dm-pre-reloc;
+ u-boot,dm-spl;
eeprom0: eeprom@50 {
};
@@ -98,6 +99,11 @@
&pmic {
u-boot,dm-pre-reloc;
+ u-boot,dm-spl;
+
+ regulators {
+ u-boot,dm-spl;
+ };
};
&flash0 {
@@ -288,3 +294,39 @@
bias-pull-up;
};
};
+
+&reg11 {
+ u-boot,dm-spl;
+};
+
+&reg18 {
+ u-boot,dm-spl;
+};
+
+&usb33 {
+ u-boot,dm-spl;
+};
+
+&usbotg_hs_pins_a {
+ u-boot,dm-spl;
+};
+
+&usbotg_hs {
+ u-boot,dm-spl;
+};
+
+&usbphyc {
+ u-boot,dm-spl;
+};
+
+&usbphyc_port0 {
+ u-boot,dm-spl;
+};
+
+&usbphyc_port1 {
+ u-boot,dm-spl;
+};
+
+&vdd_usb {
+ u-boot,dm-spl;
+};