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authorSimon Glass <sjg@chromium.org>2019-09-25 08:56:37 -0600
committerBin Meng <bmeng.cn@gmail.com>2019-10-08 13:57:47 +0800
commit55a6b13a75276fbdf7186b34b4ad72238a7ec16b (patch)
tree9efd23735408507ff6fd90df3f27ebcdc6888607 /arch/x86/cpu/broadwell
parent246ac08b037befab08805750049df75044ab7f6c (diff)
downloadu-boot-55a6b13a75276fbdf7186b34b4ad72238a7ec16b.tar.gz
x86: Use a common bus clock for Intel CPUs
Modern Intel CPUs use a standard bus clock value of 100MHz, so put this in a common file and tidy up the copies. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/broadwell')
-rw-r--r--arch/x86/cpu/broadwell/cpu.c2
-rw-r--r--arch/x86/cpu/broadwell/cpu_full.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index 61003a6d68..586a2e8f05 100644
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -60,7 +60,7 @@ void set_max_freq(void)
msr_write(MSR_IA32_PERF_CTL, perf_ctl);
debug("CPU: frequency set to %d MHz\n",
- ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK);
+ ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ);
}
int arch_cpu_init(void)
diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c
index d1f3c07109..58cc2f362c 100644
--- a/arch/x86/cpu/broadwell/cpu_full.c
+++ b/arch/x86/cpu/broadwell/cpu_full.c
@@ -360,7 +360,7 @@ static void set_max_ratio(void)
msr_write(MSR_IA32_PERF_CTL, perf_ctl);
debug("cpu: frequency set to %d\n",
- ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK);
+ ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ);
}
int broadwell_init(struct udevice *dev)
@@ -634,7 +634,7 @@ void cpu_set_power_limits(int power_limit_1_time)
static int broadwell_get_info(struct udevice *dev, struct cpu_info *info)
{
- return cpu_intel_get_info(info, BROADWELL_BCLK);
+ return cpu_intel_get_info(info, INTEL_BCLK_MHZ);
}
static int broadwell_get_count(struct udevice *dev)