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authorHannes Schmelzer <oe5hpm@oevsv.at>2018-11-18 23:19:43 +0100
committerBin Meng <bmeng.cn@gmail.com>2018-12-10 10:12:29 +0800
commitda4cfa6b442809fc99a6b75255a99eee51a4e13b (patch)
tree62e83f5f17430bf13b45b28da6a3adcad65f3ddb /arch/x86/Kconfig
parent73af0601e1d63f54cc9b704e07e9093a35e7d6f1 (diff)
downloadu-boot-da4cfa6b442809fc99a6b75255a99eee51a4e13b.tar.gz
x86: make the LAPIC / IOAPIC construct switchable with Kconfig
There are still systems running which do not have any LAPIC or even IOAPIC. Responsible MSRs for those do not exist and the systems are crashing on trying to setup LAPIC. This commit makes the APIC stuff able to switch off for those boards which dont' have an LAPIC / IOAPIC. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/Kconfig')
-rw-r--r--arch/x86/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index a1c18d26e1..8fc9187165 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -736,6 +736,15 @@ config I8259_PIC
slave) interrupt controllers. Include this to have U-Boot set up
the interrupt correctly.
+config APIC
+ bool
+ default y
+ help
+ The (A)dvanced (P)rogrammable (I)nterrupt (C)ontroller is responsible
+ for catching interrupts and distributing them to one or more CPU
+ cores. In most cases there are some LAPICs (local) for each core and
+ one I/O APIC. This conjunction is found on most modern x86 systems.
+
config PINCTRL_ICH6
bool
help