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authorAndre Przywara <andre.przywara@arm.com>2022-12-08 20:33:57 +0000
committerAndre Przywara <andre.przywara@arm.com>2023-04-12 00:17:22 +0100
commit342abc1472248b38698a52a6e4c66e30c9bfaad7 (patch)
tree868bf1e39bf3f880c259f132c1c930d838735f22 /arch/arm/mach-sunxi/Kconfig
parentdeb77f18bf68eef3a94ae9e63498d67ee7be7151 (diff)
downloadu-boot-342abc1472248b38698a52a6e4c66e30c9bfaad7.tar.gz
sunxi: boot0.h: allow RVBAR MMIO address customisation
To switch the ARMv8 Allwinner SoCs into the 64-bit AArch64 ISA, we need to program the 64-bit start code address into an MMIO mapped register that shadows the architectural RVBAR register. This address is SoC specific, with just two versions out there so far. Now a third address emerged, on a *variant* of an existing SoC (H616). Change the boot0.h start code to make this address a Kconfig selectable option, to allow easier maintenance. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Diffstat (limited to 'arch/arm/mach-sunxi/Kconfig')
-rw-r--r--arch/arm/mach-sunxi/Kconfig12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 6be8a4de53..71a413108f 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -129,6 +129,18 @@ config SUNXI_SRAM_ADDRESS
Some newer SoCs map the boot ROM at address 0 instead and move the
SRAM to a different address.
+config SUNXI_RVBAR_ADDRESS
+ hex
+ depends on ARM64
+ default 0x09010040 if SUN50I_GEN_H6
+ default 0x017000a0
+ ---help---
+ The read-only RVBAR system register holds the address of the first
+ instruction to execute after a reset. Allwinner cores provide a
+ writable MMIO backing store for this register, to allow to set the
+ entry point when switching to AArch64. This store is on different
+ addresses, depending on the SoC.
+
config SUNXI_A64_TIMER_ERRATUM
bool