diff options
| author | Chee Hong Ang <chee.hong.ang@intel.com> | 2020-08-05 21:15:57 +0800 |
|---|---|---|
| committer | Ley Foon Tan <ley.foon.tan@intel.com> | 2020-10-09 17:53:11 +0800 |
| commit | b3e2d9fccbe7390a859f7f46001c6312cc35455c (patch) | |
| tree | 54fb5133a8eb0b7a9fb7d1c4377ec2c825c70764 /arch/arm/mach-socfpga/include | |
| parent | d7a1ff40d6006c818c9e74d3e13bec008638349f (diff) | |
| download | u-boot-b3e2d9fccbe7390a859f7f46001c6312cc35455c.tar.gz | |
arm: socfpga: soc64: Show reset state in SPL
Print reset state (warm/cold) together with the
source (watchdog/MPU) which has triggered the warm
reset on S10 & Agilex.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/include')
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h b/arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h index fc60f6a105..c8bb727aa2 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h @@ -8,6 +8,7 @@ void reset_deassert_peripherals_handoff(void); int cpu_has_been_warmreset(void); +void print_reset_info(void); void socfpga_bridges_reset(int enable); #define RSTMGR_SOC64_STATUS 0x00 |