diff options
| author | Ramon Fried <ramon.fried@gmail.com> | 2019-01-12 11:47:27 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-01-25 12:12:56 -0500 |
| commit | ea7bf8fb08872bc5e1fe9b10b1ccf05de5df4a4c (patch) | |
| tree | 1c708f8177e5cdeb49aa44401cbfa1eacfdbf9e7 /arch/arm/mach-snapdragon | |
| parent | b1cd785755642eff17aa3de21ad33c8dabfe64cd (diff) | |
| download | u-boot-ea7bf8fb08872bc5e1fe9b10b1ccf05de5df4a4c.tar.gz | |
arm: mach-snapdragon: pinctrl: clarify gpio disable bit
The TLMM_GPIO_ENABLE bit is actually use to disable
the GPIO. change it to TLMM_GPIO_DISABLE so it's clearer.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Diffstat (limited to 'arch/arm/mach-snapdragon')
| -rw-r--r-- | arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c index ac511d9ee5..9ba8fdd729 100644 --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c @@ -22,7 +22,7 @@ struct msm_pinctrl_priv { #define TLMM_GPIO_PULL_MASK GENMASK(1, 0) #define TLMM_FUNC_SEL_MASK GENMASK(5, 2) #define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6) -#define TLMM_GPIO_ENABLE BIT(9) +#define TLMM_GPIO_DISABLE BIT(9) static const struct pinconf_param msm_conf_params[] = { { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 3 }, @@ -74,7 +74,7 @@ static int msm_pinmux_set(struct udevice *dev, unsigned int pin_selector, struct msm_pinctrl_priv *priv = dev_get_priv(dev); clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), - TLMM_FUNC_SEL_MASK | TLMM_GPIO_ENABLE, + TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE, priv->data->get_function_mux(func_selector) << 2); return 0; } |