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| author | Vignesh R <vigneshr@ti.com> | 2019-02-05 11:29:28 +0530 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2019-02-07 15:33:22 +0530 |
| commit | 6d82517836418f984b7b4c05cf1427d7b49b1169 (patch) | |
| tree | 847f72132490b66b2a8c6060f45fa8d228090ff4 /arch/arm/dts/sun5i-a13-difrnce-dit4350.dts | |
| parent | 75b2ec2a22964c7e8c51b2e4c903284fe6013b4f (diff) | |
| download | u-boot-6d82517836418f984b7b4c05cf1427d7b49b1169.tar.gz | |
configs: Don't use SPI_FLASH_BAR as default
Now that new SPI NOR layer uses stateless 4 byte opcodes by default,
don't enable SPI_FLASH_BAR. For SPI controllers that cannot support
4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c,
renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to
not break functionality.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Diffstat (limited to 'arch/arm/dts/sun5i-a13-difrnce-dit4350.dts')
0 files changed, 0 insertions, 0 deletions