dts: arm: socfpga: merge gen5 devicetrees from linux

Add -u-boot.dtsi files to keep the current U-Boot behaviour:
- add u-boot,dm-pre-reloc where required
- disable watchdog
- set uart clock frequency
- add gpio bank-name properties
where appropriate:
- make qspi work (add alias for spi0, fix compatible for flash)
- enable usb (status okay, add alias for udc0)

Adapt board dts files that are not in Linux to keep their old
behaviour.

Change licenses to SPDX.

(Patman warnings/errors are in 1:1 copied files from Linux)

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

1 files changed, 60 insertions, 0 deletions

diff --git a/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi
new file mode 100644
index 0000000000..360b946ba2
--- /dev/null
+++ b/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR X11)
+/*
+ * U-Boot additions
+ *
+ * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ * Copyright (c) 2018 Simon Goldschmidt
+ */
+
+/{
+	aliases {
+		spi0 = "/soc/spi@ff705000";
+		udc0 = &usb0;
+	};
+
+	soc {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&watchdog0 {
+	status = "disabled";
+};
+
+&mmc {
+	u-boot,dm-pre-reloc;
+};
+
+&qspi {
+	u-boot,dm-pre-reloc;
+
+	n25q128@0 {
+		compatible = "n25q128", "spi-flash";
+		u-boot,dm-pre-reloc;
+	};
+	n25q00@1 {
+		compatible = "n25q00", "spi-flash";
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&uart0 {
+	clock-frequency = <100000000>;
+	u-boot,dm-pre-reloc;
+};
+
+&uart1 {
+	clock-frequency = <100000000>;
+};
+
+&porta {
+	bank-name = "porta";
+};
+
+&portb {
+	bank-name = "portb";
+};
+
+&portc {
+	bank-name = "portc";
+};