ARM: rmobile: Sync Gen3 DTS with Linux v4.17

Sync the DTs with Linux v4.17.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

1 files changed, 123 insertions, 4 deletions

diff --git a/arch/arm/dts/r8a77965.dtsi b/arch/arm/dts/r8a77965.dtsi
index 3630b52a92..7a5d68be13 100644
--- a/arch/arm/dts/r8a77965.dtsi
+++ b/arch/arm/dts/r8a77965.dtsi
@@ -18,6 +18,10 @@
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	aliases {
+		i2c7 = &i2c_dvfs;
+	};
+
 	psci {
 		compatible = "arm,psci-1.0", "arm,psci-0.2";
 		method = "smc";
@@ -47,7 +51,6 @@
 
 		L2_CA57: cache-controller-0 {
 			compatible = "cache";
-			reg = <0>;
 			power-domains = <&sysc 12>;
 			cache-unified;
 			cache-level = <2>;
@@ -317,7 +320,19 @@
 		};
 
 		intc_ex: interrupt-controller@e61c0000 {
-			/* placeholder */
+			compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			reg = <0 0xe61c0000 0 0x200>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 407>;
+			power-domains = <&sysc 32>;
+			resets = <&cpg 407>;
 		};
 
 		dmac0: dma-controller@e6700000 {
@@ -523,56 +538,109 @@
 			compatible = "renesas,etheravb-r8a77965",
 				     "renesas,etheravb-rcar-gen3";
 			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "ch0", "ch1", "ch2", "ch3",
+					  "ch4", "ch5", "ch6", "ch7",
+					  "ch8", "ch9", "ch10", "ch11",
+					  "ch12", "ch13", "ch14", "ch15",
+					  "ch16", "ch17", "ch18", "ch19",
+					  "ch20", "ch21", "ch22", "ch23",
+					  "ch24";
 			clocks = <&cpg CPG_MOD 812>;
 			power-domains = <&sysc 32>;
 			resets = <&cpg 812>;
-			phy-mode = "rgmii-txid";
+			phy-mode = "rgmii";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
 		};
 
 		csi20: csi2@fea80000 {
+			reg = <0 0xfea80000 0 0x10000>;
 			/* placeholder */
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
 		};
 
 		csi40: csi2@feaa0000 {
+			reg = <0 0xfeaa0000 0 0x10000>;
 			/* placeholder */
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
 		};
 
 		vin0: video@e6ef0000 {
+			reg = <0 0xe6ef0000 0 0x1000>;
 			/* placeholder */
 		};
 
 		vin1: video@e6ef1000 {
+			reg = <0 0xe6ef1000 0 0x1000>;
 			/* placeholder */
 		};
 
 		vin2: video@e6ef2000 {
+			reg = <0 0xe6ef2000 0 0x1000>;
 			/* placeholder */
 		};
 
 		vin3: video@e6ef3000 {
+			reg = <0 0xe6ef3000 0 0x1000>;
 			/* placeholder */
 		};
 
 		vin4: video@e6ef4000 {
+			reg = <0 0xe6ef4000 0 0x1000>;
 			/* placeholder */
 		};
 
 		vin5: video@e6ef5000 {
+			reg = <0 0xe6ef5000 0 0x1000>;
 			/* placeholder */
 		};
 
 		vin6: video@e6ef6000 {
+			reg = <0 0xe6ef6000 0 0x1000>;
 			/* placeholder */
 		};
 
 		vin7: video@e6ef7000 {
+			reg = <0 0xe6ef7000 0 0x1000>;
 			/* placeholder */
 		};
 
 		ohci0: usb@ee080000 {
+			reg = <0 0xee080000 0 0x100>;
 			/* placeholder */
 		};
 
@@ -602,6 +670,7 @@
 		};
 
 		ohci1: usb@ee0a0000 {
+			reg = <0 0xee0a0000 0 0x100>;
 			/* placeholder */
 		};
 
@@ -619,69 +688,107 @@
 		};
 
 		i2c0: i2c@e6500000 {
+			reg = <0 0xe6500000 0 0x40>;
 			/* placeholder */
 		};
 
 		i2c1: i2c@e6508000 {
+			reg = <0 0xe6508000 0 0x40>;
 			/* placeholder */
 		};
 
 		i2c2: i2c@e6510000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			reg = <0 0xe6510000 0 0x40>;
 			/* placeholder */
 		};
 
 		i2c3: i2c@e66d0000 {
+			reg = <0 0xe66d0000 0 0x40>;
 			/* placeholder */
 		};
 
 		i2c4: i2c@e66d8000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			reg = <0 0xe66d8000 0 0x40>;
 			/* placeholder */
 		};
 
 		i2c5: i2c@e66e0000 {
+			reg = <0 0xe66e0000 0 0x40>;
 			/* placeholder */
 		};
 
 		i2c6: i2c@e66e8000 {
+			reg = <0 0xe66e8000 0 0x40>;
 			/* placeholder */
 		};
 
 		i2c_dvfs: i2c@e60b0000 {
-			/* placeholder */
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "renesas,iic-r8a77965",
+				     "renesas,rcar-gen3-iic",
+				     "renesas,rmobile-iic";
+			reg = <0 0xe60b0000 0 0x425>;
+			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 926>;
+			power-domains = <&sysc 32>;
+			resets = <&cpg 926>;
+			dmas = <&dmac0 0x11>, <&dmac0 0x10>;
+			dma-names = "tx", "rx";
+			status = "disabled";
 		};
 
 		pwm0: pwm@e6e30000 {
+			reg = <0 0xe6e30000 0 8>;
 			/* placeholder */
 		};
 
 		pwm1: pwm@e6e31000 {
+			reg = <0 0xe6e31000 0 8>;
+			#pwm-cells = <2>;
 			/* placeholder */
 		};
 
 		pwm2: pwm@e6e32000 {
+			reg = <0 0xe6e32000 0 8>;
 			/* placeholder */
 		};
 
 		pwm3: pwm@e6e33000 {
+			reg = <0 0xe6e33000 0 8>;
 			/* placeholder */
 		};
 
 		pwm4: pwm@e6e34000 {
+			reg = <0 0xe6e34000 0 8>;
 			/* placeholder */
 		};
 
 		pwm5: pwm@e6e35000 {
+			reg = <0 0xe6e35000 0 8>;
 			/* placeholder */
 		};
 
 		pwm6: pwm@e6e36000 {
+			reg = <0 0xe6e36000 0 8>;
 			/* placeholder */
 		};
 
 		du: display@feb00000 {
+			reg = <0 0xfeb00000 0 0x80000>,
+			      <0 0xfeb90000 0 0x14>;
 			/* placeholder */
 
 			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
 				port@0 {
 					reg = <0>;
 					du_out_rgb: endpoint {
@@ -701,18 +808,26 @@
 		};
 
 		hsusb: usb@e6590000 {
+			reg = <0 0xe6590000 0 0x100>;
 			/* placeholder */
 		};
 
 		pciec0: pcie@fe000000 {
+			reg = <0 0xfe000000 0 0x80000>;
 			/* placeholder */
 		};
 
 		pciec1: pcie@ee800000 {
+			reg = <0 0xee800000 0 0x80000>;
 			/* placeholder */
 		};
 
 		rcar_sound: sound@ec500000 {
+			reg =	<0 0xec500000 0 0x1000>, /* SCU */
+				<0 0xec5a0000 0 0x100>,  /* ADG */
+				<0 0xec540000 0 0x1000>, /* SSIU */
+				<0 0xec541000 0 0x280>,  /* SSI */
+				<0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 			/* placeholder */
 
 			rcar_sound,dvc {
@@ -801,10 +916,13 @@
 		};
 
 		usb3_phy0: usb-phy@e65ee000 {
+			reg = <0 0xe65ee000 0 0x90>;
+			#phy-cells = <0>;
 			/* placeholder */
 		};
 
 		usb3_peri0: usb@ee020000 {
+			reg = <0 0xee020000 0 0x400>;
 			/* placeholder */
 		};
 
@@ -820,6 +938,7 @@
 		};
 
 		wdt0: watchdog@e6020000 {
+			reg = <0 0xe6020000 0 0x0c>;
 			/* placeholder */
 		};
 	};