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authorRobert Beckett <bob.beckett@collabora.com>2019-11-12 19:15:11 +0000
committerStefano Babic <sbabic@denx.de>2020-01-07 10:26:56 +0100
commit8c26739859c605d803b89f6ae202c6d29d2d2a54 (patch)
tree653e155453c8354c77ca7b3f6cebfd7c689dc1d1 /arch/arm/dts/imx6q-bx50v3.dts
parent010e58d448d5cb184fc53d6bbb87deee3ce5b223 (diff)
downloadu-boot-8c26739859c605d803b89f6ae202c6d29d2d2a54.tar.gz
board: ge: bx50v3: sync devicetrees from Linux
Copy device trees from linux, keeping them as separate files for each board to ease future sync. Update board code to use generic bx50v3 dt initially, then select the specific dt based on board detection. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Diffstat (limited to 'arch/arm/dts/imx6q-bx50v3.dts')
-rw-r--r--arch/arm/dts/imx6q-bx50v3.dts78
1 files changed, 4 insertions, 74 deletions
diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
index deaec63509..a44d7004cb 100644
--- a/arch/arm/dts/imx6q-bx50v3.dts
+++ b/arch/arm/dts/imx6q-bx50v3.dts
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0+ OR X11 */
+// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2015 Timesys Corporation.
* Copyright 2018 General Electric Company
@@ -7,83 +7,13 @@
/dts-v1/;
-#include "imx6q.dtsi"
-#include <dt-bindings/gpio/gpio.h>
+#include "imx6q-bx50v3.dtsi"
/ {
model = "General Electric Bx50v3";
compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q";
-};
-
-&iomuxc {
- pinctrl-names = "default";
-
- pinctrl_ecspi1: ecspi1grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
- /* SPI1 CS */
- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
- MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
- MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
- MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
- MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
- >;
- };
-
- pinctrl_usdhc3_reset: usdhc3grp-reset {
- fsl,pins = <
- MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
- >;
- };
-};
-
-&usdhc1 {
- status = "disabled";
-};
-
-&usdhc2 {
- status = "disabled";
-};
-
-/* eMMC */
-&usdhc3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
- bus-width = <8>;
- non-removable;
- keep-power-in-suspend;
- status = "okay";
-};
-
-&usdhc4 {
- status = "disabled";
-};
-
-/* SPI NOR */
-&ecspi1 {
- cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1>;
- status = "okay";
- flash: n25q032@0 {
- compatible = "jedec,spi-nor";
- #address-cells = <1>;
- #size-cells = <1>;
- spi-max-frequency = <20000000>;
- reg = <0>;
+ chosen {
+ stdout-path = &uart3;
};
};