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authorAlbert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr>2015-03-31 11:40:44 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2015-04-10 14:22:56 +0200
commitc8381bf435ddb104594df00411a8ebd049dd753c (patch)
tree0269cb43c5534f7985930f02cf898ee15940b072 /arch/arm/cpu
parentac2916a2245d999006585b6bb1e312639fa4929b (diff)
downloadu-boot-c8381bf435ddb104594df00411a8ebd049dd753c.tar.gz
lpc32xx: mtd: nand: add MLC NAND controller
The controller's Reed-Solomon ECC hardware is used except of course for raw reads and writes. It covers in- and out-of-band data together. The SPL framework is supported. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/arm926ejs/lpc32xx/devices.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index 062db8d822..be4c93deb2 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -44,3 +44,9 @@ void lpc32xx_mac_init(void)
writel(CLK_MAC_REG | CLK_MAC_SLAVE | CLK_MAC_MASTER
| CLK_MAC_MII, &clk->macclk_ctrl);
}
+
+void lpc32xx_mlc_nand_init(void)
+{
+ /* Enable NAND interface */
+ writel(CLK_NAND_MLC | CLK_NAND_MLC_INT, &clk->flashclk_ctrl);
+}