diff options
| author | Álvaro Fernández Rojas <noltari@gmail.com> | 2018-02-04 21:11:16 +0100 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2018-03-21 23:23:13 +0100 |
| commit | ee1f79b7385d192141fb7bb0dbf242226e8bef46 (patch) | |
| tree | 8d87e822a574ec163a980d4456c7b864a14b1303 | |
| parent | 8e948c6ff1f3765fda846260a6abd65361902a3d (diff) | |
| download | u-boot-ee1f79b7385d192141fb7bb0dbf242226e8bef46.tar.gz | |
mips: bmips: add support for bcm6318 usb
Signed-off-by: Ãlvaro Fernández Rojas <noltari@gmail.com>
| -rw-r--r-- | arch/mips/dts/brcm,bcm6318.dtsi | 30 | ||||
| -rw-r--r-- | include/configs/bmips_bcm6318.h | 7 |
2 files changed, 37 insertions, 0 deletions
diff --git a/arch/mips/dts/brcm,bcm6318.dtsi b/arch/mips/dts/brcm,bcm6318.dtsi index 54964a7009..015acc9173 100644 --- a/arch/mips/dts/brcm,bcm6318.dtsi +++ b/arch/mips/dts/brcm,bcm6318.dtsi @@ -153,5 +153,35 @@ reg = <0x10004000 0x38>; u-boot,dm-pre-reloc; }; + + ehci: usb-controller@10005000 { + compatible = "brcm,bcm6318-ehci", "generic-ehci"; + reg = <0x10005000 0x100>; + phys = <&usbh>; + big-endian; + + status = "disabled"; + }; + + ohci: usb-controller@10005100 { + compatible = "brcm,bcm6318-ohci", "generic-ohci"; + reg = <0x10005100 0x100>; + phys = <&usbh>; + big-endian; + + status = "disabled"; + }; + + usbh: usb-phy@10005200 { + compatible = "brcm,bcm6318-usbh"; + reg = <0x10005200 0x30>; + #phy-cells = <0>; + clocks = <&periph_clk BCM6318_CLK_USB>; + clock-names = "usbh"; + power-domains = <&periph_pwr BCM6318_PWR_USB>; + resets = <&periph_rst BCM6318_RST_USBH>; + + status = "disabled"; + }; }; }; diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h index 454a7b7f7b..5541cc5cf6 100644 --- a/include/configs/bmips_bcm6318.h +++ b/include/configs/bmips_bcm6318.h @@ -14,6 +14,13 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 +/* USB */ +#define CONFIG_EHCI_DESC_BIG_ENDIAN +#define CONFIG_EHCI_MMIO_BIG_ENDIAN +#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_OHCI_NEW + /* U-Boot */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 |