ARM: socfpga: Rename MCVEVK

The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>

11 files changed, 12 insertions, 12 deletions

diff --git a/arch/arm/dts/socfpga_cyclone5_mcvevk.dts b/arch/arm/dts/socfpga_cyclone5_mcvevk.dts
index 7d3f989472..1462f0881a 100644
--- a/arch/arm/dts/socfpga_cyclone5_mcvevk.dts
+++ b/arch/arm/dts/socfpga_cyclone5_mcvevk.dts
@@ -7,7 +7,7 @@
 #include "socfpga_cyclone5.dtsi"
 
 / {
-	model = "DENX MCVEVK";
+	model = "Aries MCVEVK";
 	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
 
 	chosen {
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index e56b3db115..18bb6dce3c 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -56,8 +56,8 @@ config TARGET_SOCFPGA_CYCLONE5_SOCDK
 	bool "Altera SOCFPGA SoCDK (Cyclone V)"
 	select TARGET_SOCFPGA_CYCLONE5
 
-config TARGET_SOCFPGA_DENX_MCVEVK
-	bool "DENX MCVEVK (Cyclone V)"
+config TARGET_SOCFPGA_ARIES_MCVEVK
+	bool "Aries MCVEVK (Cyclone V)"
 	select TARGET_SOCFPGA_CYCLONE5
 
 config TARGET_SOCFPGA_EBV_SOCRATES
@@ -97,7 +97,7 @@ config SYS_BOARD
 	default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
 	default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
 	default "is1" if TARGET_SOCFPGA_IS1
-	default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
+	default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK
 	default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
 	default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
 	default "sr1500" if TARGET_SOCFPGA_SR1500
@@ -106,7 +106,7 @@ config SYS_BOARD
 config SYS_VENDOR
 	default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
 	default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
-	default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
+	default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK
 	default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
 	default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
 	default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
@@ -122,7 +122,7 @@ config SYS_CONFIG_NAME
 	default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
 	default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
 	default "socfpga_is1" if TARGET_SOCFPGA_IS1
-	default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
+	default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK
 	default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
 	default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
 	default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
diff --git a/board/denx/mcvevk/MAINTAINERS b/board/aries/mcvevk/MAINTAINERS
index 6787727d84..c3a3a2b87d 100644
--- a/board/denx/mcvevk/MAINTAINERS
+++ b/board/aries/mcvevk/MAINTAINERS
@@ -1,5 +1,5 @@
-SOCKIT BOARD
-M:	Marek Vasut <marex@denx.de>
+Aries MCVEVK BOARD
+M:	Marek Vasut <marek.vasut@gmail.com>
 S:	Maintained
 F:	include/configs/socfpga_mcvevk.h
 F:	configs/socfpga_mcvevk_defconfig
diff --git a/board/denx/mcvevk/Makefile b/board/aries/mcvevk/Makefile
index 86f9b78cad..86f9b78cad 100644
--- a/board/denx/mcvevk/Makefile
+++ b/board/aries/mcvevk/Makefile
diff --git a/board/denx/mcvevk/qts/iocsr_config.h b/board/aries/mcvevk/qts/iocsr_config.h
index 3021830d00..3021830d00 100644
--- a/board/denx/mcvevk/qts/iocsr_config.h
+++ b/board/aries/mcvevk/qts/iocsr_config.h
diff --git a/board/denx/mcvevk/qts/pinmux_config.h b/board/aries/mcvevk/qts/pinmux_config.h
index ea2f7ab3b3..ea2f7ab3b3 100644
--- a/board/denx/mcvevk/qts/pinmux_config.h
+++ b/board/aries/mcvevk/qts/pinmux_config.h
diff --git a/board/denx/mcvevk/qts/pll_config.h b/board/aries/mcvevk/qts/pll_config.h
index b718b39e96..b718b39e96 100644
--- a/board/denx/mcvevk/qts/pll_config.h
+++ b/board/aries/mcvevk/qts/pll_config.h
diff --git a/board/denx/mcvevk/qts/sdram_config.h b/board/aries/mcvevk/qts/sdram_config.h
index ff64f555c0..ff64f555c0 100644
--- a/board/denx/mcvevk/qts/sdram_config.h
+++ b/board/aries/mcvevk/qts/sdram_config.h
diff --git a/board/denx/mcvevk/socfpga.c b/board/aries/mcvevk/socfpga.c
index 6be58f047f..6be58f047f 100644
--- a/board/denx/mcvevk/socfpga.c
+++ b/board/aries/mcvevk/socfpga.c
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index b16ee1c06a..627b90f771 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_TARGET_SOCFPGA_DENX_MCVEVK=y
+CONFIG_TARGET_SOCFPGA_ARIES_MCVEVK=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"
 CONFIG_FIT=y
diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h
index 3c9ba6de23..604ea20e2c 100644
--- a/include/configs/socfpga_mcvevk.h
+++ b/include/configs/socfpga_mcvevk.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
-#ifndef __CONFIG_DENX_MCVEVK_H__
-#define __CONFIG_DENX_MCVEVK_H__
+#ifndef __CONFIG_ARIES_MCVEVK_H__
+#define __CONFIG_ARIES_MCVEVK_H__
 
 #include <asm/arch/base_addr_ac5.h>
 
@@ -105,4 +105,4 @@
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
 
-#endif	/* __CONFIG_DENX_MCVEVK_H__ */
+#endif	/* __CONFIG_ARIES_MCVEVK_H__ */