diff options
| author | Simon Glass <sjg@chromium.org> | 2020-05-10 14:17:02 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-06-25 13:24:13 -0400 |
| commit | c68a1ae6ab760d797f4dde2c5c671e18d0e2adb4 (patch) | |
| tree | d57377eec42fbfecfc3108d8b64b8061331fed3a | |
| parent | aef43ea0606deefc97ed085b16618f18a911cdb5 (diff) | |
| download | u-boot-WIP/2020-06-25-tidy-up-bd-command.tar.gz | |
bdinfo: x86: vesa: Update fb_base to the correct valueWIP/2020-06-25-tidy-up-bd-command
Set this value in global_data so that it is reported correctly on x86
boards.
In fact, U-Boot allocates space for the frame buffer even though it is not
used. Then the FSP picks the address itself (e.g. 0xb0000000). So the
value set by U-Boot (high in memory with everything else that is
relocated), is not actually the correct value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| -rw-r--r-- | arch/x86/lib/fsp/fsp_graphics.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c index 70224c1a48..6e23f3c95f 100644 --- a/arch/x86/lib/fsp/fsp_graphics.c +++ b/arch/x86/lib/fsp/fsp_graphics.c @@ -98,6 +98,7 @@ static int fsp_video_probe(struct udevice *dev) * For IGD, it seems to be always on BAR2. */ vesa->phys_base_ptr = dm_pci_read_bar32(dev, 2); + gd->fb_base = vesa->phys_base_ptr; ret = vbe_setup_video_priv(vesa, uc_priv, plat); if (ret) @@ -106,8 +107,8 @@ static int fsp_video_probe(struct udevice *dev) mtrr_add_request(MTRR_TYPE_WRCOMB, vesa->phys_base_ptr, 256 << 20); mtrr_commit(true); - printf("%dx%dx%d\n", uc_priv->xsize, uc_priv->ysize, - vesa->bits_per_pixel); + printf("%dx%dx%d @ %x\n", uc_priv->xsize, uc_priv->ysize, + vesa->bits_per_pixel, vesa->phys_base_ptr); return 0; |