summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAshok Reddy Soma <ashok.reddy.soma@xilinx.com>2020-10-23 04:58:58 -0600
committerMichal Simek <michal.simek@xilinx.com>2020-10-27 08:13:33 +0100
commit17a42abb40dd006b5f0e96d69e4894bef4c04ba8 (patch)
tree5093c293bd04bc712e143d531e33834c3e12d005
parent7a49a16ec54e03ea6a383c1b97a78acc059c2df8 (diff)
downloadu-boot-17a42abb40dd006b5f0e96d69e4894bef4c04ba8.tar.gz
mmc: Define timing macro's
Define timing macro's for all the available speeds of mmc. This is done similar to linux. Replace speed macro's used with these new timing macro's wherever applicable. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
-rw-r--r--board/xilinx/zynqmp/tap_delays.c10
-rw-r--r--drivers/mmc/zynq_sdhci.c24
-rw-r--r--include/mmc.h13
3 files changed, 25 insertions, 22 deletions
diff --git a/board/xilinx/zynqmp/tap_delays.c b/board/xilinx/zynqmp/tap_delays.c
index 5fde0aed7d..13683701f6 100644
--- a/board/xilinx/zynqmp/tap_delays.c
+++ b/board/xilinx/zynqmp/tap_delays.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <asm/arch/sys_proto.h>
#include <linux/delay.h>
+#include <mmc.h>
#define SD_DLL_CTRL 0xFF180358
#define SD_ITAP_DLY 0xFF180314
@@ -54,15 +55,6 @@
#define MMC_BANK2 0x2
-#define MMC_TIMING_UHS_SDR25 1
-#define MMC_TIMING_UHS_SDR50 2
-#define MMC_TIMING_UHS_SDR104 3
-#define MMC_TIMING_UHS_DDR50 4
-#define MMC_TIMING_MMC_HS200 5
-#define MMC_TIMING_SD_HS 6
-#define MMC_TIMING_MMC_DDR52 7
-#define MMC_TIMING_MMC_HS 8
-
void zynqmp_dll_reset(u8 deviceid)
{
/* Issue DLL Reset */
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 88e478ee11..4f62bd008d 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -32,20 +32,18 @@ struct arasan_sdhci_priv {
};
#if defined(CONFIG_ARCH_ZYNQMP)
-#define MMC_HS200_BUS_SPEED 5
-
static const u8 mode2timing[] = {
- [MMC_LEGACY] = UHS_SDR12_BUS_SPEED,
- [MMC_HS] = HIGH_SPEED_BUS_SPEED,
- [SD_HS] = HIGH_SPEED_BUS_SPEED,
- [MMC_HS_52] = HIGH_SPEED_BUS_SPEED,
- [MMC_DDR_52] = HIGH_SPEED_BUS_SPEED,
- [UHS_SDR12] = UHS_SDR12_BUS_SPEED,
- [UHS_SDR25] = UHS_SDR25_BUS_SPEED,
- [UHS_SDR50] = UHS_SDR50_BUS_SPEED,
- [UHS_DDR50] = UHS_DDR50_BUS_SPEED,
- [UHS_SDR104] = UHS_SDR104_BUS_SPEED,
- [MMC_HS_200] = MMC_HS200_BUS_SPEED,
+ [MMC_LEGACY] = MMC_TIMING_LEGACY,
+ [MMC_HS] = MMC_TIMING_MMC_HS,
+ [SD_HS] = MMC_TIMING_SD_HS,
+ [MMC_HS_52] = MMC_TIMING_UHS_SDR50,
+ [MMC_DDR_52] = MMC_TIMING_UHS_DDR50,
+ [UHS_SDR12] = MMC_TIMING_UHS_SDR12,
+ [UHS_SDR25] = MMC_TIMING_UHS_SDR25,
+ [UHS_SDR50] = MMC_TIMING_UHS_SDR50,
+ [UHS_DDR50] = MMC_TIMING_UHS_DDR50,
+ [UHS_SDR104] = MMC_TIMING_UHS_SDR104,
+ [MMC_HS_200] = MMC_TIMING_MMC_HS200,
};
#define SDHCI_TUNING_LOOP_COUNT 40
diff --git a/include/mmc.h b/include/mmc.h
index ac7b54f1a7..1d377e0281 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -360,6 +360,19 @@ enum mmc_voltage {
#define MMC_NUM_BOOT_PARTITION 2
#define MMC_PART_RPMB 3 /* RPMB partition number */
+/* timing specification used */
+#define MMC_TIMING_LEGACY 0
+#define MMC_TIMING_MMC_HS 1
+#define MMC_TIMING_SD_HS 2
+#define MMC_TIMING_UHS_SDR12 3
+#define MMC_TIMING_UHS_SDR25 4
+#define MMC_TIMING_UHS_SDR50 5
+#define MMC_TIMING_UHS_SDR104 6
+#define MMC_TIMING_UHS_DDR50 7
+#define MMC_TIMING_MMC_DDR52 8
+#define MMC_TIMING_MMC_HS200 9
+#define MMC_TIMING_MMC_HS400 10
+
/* Driver model support */
/**