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* env: fat: Fix warning for unused function get_env_filenamerel_socfpga_v2022.07_23.05.01_prrel_socfpga_v2022.07_23.04.02_prrel_socfpga_v2022.07_23.04.01_prrel_socfpga_v2022.07_23.03.03_prrel_socfpga_v2022.07_23.03.02_prrel_socfpga_v2022.07_23.03.01_prrel_socfpga_v2022.07_23.02.02_prrel_socfpga_v2022.07_23.02.01_prrel_socfpga_v2022.07_23.01.02_prQPDS22.4_REL_GSRD_PRsocfpga_v2022.07Kah Jing Lee2023-01-061-0/+2
* arch: arm: rsu-spl: Compare FACTORY IMAGE with current running SPL slotKah Jing Lee2023-01-041-1/+2
* HSD #15012127929: drivers: mtd: spi: Add support for IS25WP01G SPI NOR flashrel_socfpga_v2022.07_23.01.01_prTeik Heng Chong2022-12-161-0/+2
* HSD #15011972255: drivers: mtd: spi: Add support for GD55LB02GEBIR SPI NOR flashTeik Heng Chong2022-12-161-0/+5
* usb: gadget: dfu: Fix the unchecked length fieldrel_socfpga_v2022.07_22.12.02_prVenkatesh Yadav Abbarapu2022-12-141-21/+37
* arch: arm: rsu: Multiboot selection Uboot SSBL for RSU (MMC)Kah Jing Lee2022-12-135-42/+268
* arch: arm: Kconfig: Turn off SOCFPGA_RSU_MULTIBOOT by defaultKah Jing Lee2022-12-121-1/+1
* arch: arm: rsu: Multiboot selection Uboot SSBL for RSURadu Bacrau2022-12-056-1/+224
* arm: socfpga: Add bsp-generator scripts with qts-filterKah Jing Lee2022-11-2910-60/+1986
* HSD #18025336902: intel: n5x: ddr: update license for secure_vabrel_socfpga_v2022.07_22.12.01_prLokanathan, Raaj2022-11-142-4/+4
* HSD #15011820475: arm: dts: soc64: Revert "changing DDR aliasing addresses"Lokanathan, Raaj2022-11-113-66/+6
* altera: n5x: Fix MEMCLKMGR_EXTCNTRST_C0CNTRST to bit(0)rel_socfpga_v2022.07_RC_22.11.02_prDinesh Maniyam2022-10-211-1/+1
* jenkins: Enable PR CI/CDrel_socfpga_v2022.07_RC_22.11.01_prrel_socfpga_v2022.07_RC_22.10.02_prBoon Khai Ng2022-10-041-0/+242
* doc: README.socfpga: Update for U-boot 2022.07Lokanathan, Raaj2022-09-271-5/+5
* HSD #15011817806: fs-loader: Doc improvementrel_socfpga_v2022.07_RC_22.10.01_prLokanathan, Raaj2022-09-261-0/+8
* HSD #15011817806: fs-loader: Perform code cleanups on fs-loader driverLokanathan, Raaj2022-09-264-16/+9
* HSD #15011860471: Remove cm_get_qspi_controller_clk_hz from socfpga_soc64_com...Lokanathan, Raaj2022-09-232-14/+0
* HSD #15011858928: configs: Set COUNTER_FREQUENCY configurationsLokanathan, Raaj2022-09-236-0/+6
* HSD #16018042241: arm: dts: arria10: Increase boot partition size for NANDrel_socfpga_v2022.07_RC_22.09.03_prrel_socfpga_v2022.07_RC_22.09.02_prTeoh Ji Sheng2022-09-081-2/+2
* HSD #18019005734: arch: arm: mach-socfpga: SDM Doorbell Issue FixYuslaimi, Alif Zakuan2022-08-221-10/+5
* HSD #14016953396: rsu: ignore fw cpb errors after fixing cpbsRadu Bacrau2022-08-151-2/+6
* HSD #14016896875: rsu: fix cpb headerRadu Bacrau2022-08-151-1/+1
* HSD #18022972407: drivers: clk: Update comment to describe pll bypassJit Loon Lim2022-08-152-4/+10
* HSD #15011744436: configs: socfpga: Remove SPL SPI related configs from CVLokanathan, Raaj2022-08-121-0/+4
* spi: Remove speed and mode from spi_flash_probe_bus_csLokanathan, Raaj2022-08-122-4/+0
* test: dm: spi: Replace _spi_get_bus_and_cs() by spi_get_bus_and_cs() in some ...Patrice Chotard2022-08-121-8/+4
* spi: spi_flash_probe_bus_cs() rely on DT for spi speed and modePatrice Chotard2022-08-121-2/+16
* spi: spi-uclass: Add new spi_get_bus_and_cs() implementationPatrice Chotard2022-08-122-20/+10
* configs: socfpga: Define the correct ref clock for the QSPI driverLokanathan, Raaj2022-08-123-3/+14
* HSD 15011662064: Remove "x1" register to follow mainline changesLokanathan, Raaj2022-08-121-1/+1
* drivers: mtd: spi: Add support for MX66U1G45G SPI NOR flashTeik Heng Chong2022-08-121-0/+2
* Added correction for is_ddr_init and reset_type_printLokanathan, Raaj2022-07-281-73/+27
* ddr: altera: n5x: Include DDR4 for the same hardcoding settingsTien Fong Chee2022-07-281-16/+12
* ddr: altera: n5x: Fixing debug log typoTien Fong Chee2022-07-281-4/+4
* ddr: altera: n5x: Ensure 'cal->header.data_len' is validatedTien Fong Chee2022-07-281-8/+35
* ddr: altera: n5x: Ensure correct size of result for correct type castingTien Fong Chee2022-07-281-4/+4
* ddr: altera: n5x: Copies calibration data to DDR when DDR retention is setTien Fong Chee2022-07-281-4/+7
* ddr: altera: n5x: Return error if invalid DDR type is detected in argumentTien Fong Chee2022-07-281-0/+3
* ddr: altera: n5x: Checking DDR init hang before reset due to watchdogTien Fong Chee2022-07-281-8/+21
* ddr: altera: n5x: Checking DDR DBETien Fong Chee2022-07-281-9/+23
* arm: socfpga: n5x: Update DDR init progress bitTien Fong Chee2022-07-281-0/+16
* ddr: altera: n5x: Add self-refresh support in DDR4Tien Fong Chee2022-07-282-42/+726
* ddr: altera: Add SDRAM driver for Intel N5X device from mainlineLokanathan, Raaj2022-07-282-828/+97
* HSD #18020445323-10: arm: dts: soc64: Move OCRAM CCU config to DTSTien Fong Chee2022-07-283-18/+22
* HSD #18020445323-9: arm: dts: agilex: Add ccu_mem0_I_main QoSTien Fong Chee2022-07-281-0/+18
* HSD #18020445323-8: arm: dts: agilex: Add fpga2sdram FW settingsTien Fong Chee2022-07-281-0/+32
* HSD #18020445323-7: ddr: altera: agilex: Remove code redundancyTien Fong Chee2022-07-281-4/+1
* HSD #18020445323-6: arm: dts: s10: Move CCU config of OCRAM to DTSTien Fong Chee2022-07-282-6/+4
* HSD #18020445323-5: arm: dts: s10: Add ccu_mem0_I_main QoSTien Fong Chee2022-07-281-0/+18
* HSD #18020445323-4: arm: dts: s10: Add fpga2sdram FW settingsTien Fong Chee2022-07-281-0/+84