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* fs/squashfs: sqfs_read: Prevent arbitrary code executionrel_socfpga_v2022.01_22.11.02_prsocfpga_v2022.01Miquel Raynal2022-11-022-4/+8
* net: nfs: Fix CVE-2022-30767 (old CVE-2019-14196)Andrea zi0Black Cappa2022-11-021-3/+1
* HSD #15011820475: arm: dts: soc64: Revert "changing DDR aliasing addresses"rel_socfpga_v2022.01_22.11.01_prrel_socfpga_v2022.01_22.10.02_prrel_socfpga_v2022.01_22.10.01_prLokanathan, Raaj2022-09-153-66/+6
* HSD #14016599689: arm: arria10: Add correct mask bits for RTRIM and PU_DRV_STRGrel_socfpga_v2022.01_22.09.03_prLokanathan, Raaj2022-09-081-2/+2
* HSD #18021819983: configs: socfpga: Change load address to 0x02000000rel_socfpga_v2022.01_22.09.02_prrel_socfpga_v2022.01_22.08.02_prDinesh Maniyam2022-07-277-0/+7
* HSD #18021819983: arm64: dts: Increase reserved memory size to 32MBDinesh Maniyam2022-07-272-4/+4
* doc: README.socfpga: Update for U-boot 2022.01 with the additional Quartusrel_socfpga_v2022.01_22.08.01_prrel_socfpga_v2022.01_22.07.02_prLokanathan, Raaj2022-07-151-3/+3
* doc: README.socfpga: Update for U-boot 2022.01 with the tested Qaurtus versionsLokanathan, Raaj2022-07-151-8/+8
* i2c: fix stack buffer overflow vulnerability in i2c md commandQPDS22.2_REL_GSRD_PRNicolas Iooss2022-07-141-12/+12
* HSD #15011081322: arm: socfpga: Add new QSPI clock path of Linux DTBrel_socfpga_v2022.01_22.07.01_prSin Hui Kho2022-06-271-6/+10
* Merge branch 'socfpga_v2022.01' of https://github.com/intel-innersource/appli...Lokanathan, Raaj2022-06-140-0/+0
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| * Merge branch 'socfpga_v2022.01_RC' of https://github.com/intel-innersource/ap...rel_socfpga_v2022.01_22.06.02_prrel_socfpga_v2022.01_22.06.01_prrel_socfpga_v2022.01_22.05.02_prLokanathan, Raaj2022-05-2015-110/+723
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| | * Merge branch 'socfpga_v2022.01_RC' of https://github.com/intel-innersource/ap...Lokanathan, Raaj2022-05-1213-107/+717
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| | | * HSD #15010938416: arm: dts: soc64: changing DDR aliasing addressesrel_socfpga_v2022.01_RC_22.05.01_prrel_socfpga_v2022.01_RC_22.04.02_prTien Fong Chee2022-04-073-8/+70
| | | * HSD #18020445323-10: arm: dts: soc64: Move OCRAM CCU config to DTSTien Fong Chee2022-04-073-18/+22
| | | * HSD #18020445323-9: arm: dts: agilex: Add ccu_mem0_I_main QoSTien Fong Chee2022-04-071-0/+18
| | | * HSD #18020445323-8: arm: dts: agilex: Add fpga2sdram FW settingsTien Fong Chee2022-04-071-0/+32
| | | * HSD #18020445323-7: ddr: altera: agilex: Remove code redundancyTien Fong Chee2022-04-071-4/+1
| | | * HSD #18020445323-6: arm: dts: s10: Move CCU config of OCRAM to DTSTien Fong Chee2022-04-072-6/+4
| | | * HSD #18020445323-5: arm: dts: s10: Add ccu_mem0_I_main QoSTien Fong Chee2022-04-071-0/+18
| | | * HSD #18020445323-4: arm: dts: s10: Add fpga2sdram FW settingsTien Fong Chee2022-04-071-0/+84
| | | * HSD #18020445323-3: arm: dts: s10: Move CCU config of DDR to DTSTien Fong Chee2022-04-072-45/+28
| | | * HSD #18020445323-2: arm: dts: Add comments for all accesses config in DTSTien Fong Chee2022-04-074-4/+17
| | | * HSD #18020445323-1: doc: dtbinding: Improve doc descriptionTien Fong Chee2022-04-071-12/+382
| | | * HSD #18016393902: doc: README.socfpga: Add Git branch releases conventionSin Hui Kho2022-04-041-10/+41
| | * | HSD #18019787883: arm: socfpga: Expand the help text for the bridge command.Lokanathan, Raaj2022-04-261-2/+3
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| | * HSD#15010839051: configs: increase CONFIG_SYS_BOOTM_LEN to supportrel_socfpga_v2022.01_RC_22.04.01_prKah Jing Lee2022-03-221-1/+1
| | * HSD#15010839051: configs: add env. variable to support compressed kernelKah Jing Lee2022-03-221-0/+2
* | | CVE-2022-30767: unbounded memcpy with a failed length checkLokanathan, Raaj2022-06-141-2/+0
* | | net: Check for the minimum IP fragmented datagram sizeLokanathan, Raaj2022-06-142-0/+5
* | | HSD #15010938416: arm: dts: soc64: changing DDR aliasing addressesTien Fong Chee2022-06-143-8/+70
* | | HSD #18020445323-10: arm: dts: soc64: Move OCRAM CCU config to DTSTien Fong Chee2022-06-143-18/+22
* | | HSD #18020445323-9: arm: dts: agilex: Add ccu_mem0_I_main QoSTien Fong Chee2022-06-141-0/+18
* | | HSD #18020445323-8: arm: dts: agilex: Add fpga2sdram FW settingsTien Fong Chee2022-06-141-0/+32
* | | HSD #18020445323-7: ddr: altera: agilex: Remove code redundancyTien Fong Chee2022-06-141-4/+1
* | | HSD #18020445323-6: arm: dts: s10: Move CCU config of OCRAM to DTSTien Fong Chee2022-06-142-6/+4
* | | HSD #18020445323-5: arm: dts: s10: Add ccu_mem0_I_main QoSTien Fong Chee2022-06-141-0/+18
* | | HSD #18020445323-4: arm: dts: s10: Add fpga2sdram FW settingsTien Fong Chee2022-06-141-0/+84
* | | HSD #18020445323-3: arm: dts: s10: Move CCU config of DDR to DTSTien Fong Chee2022-06-142-45/+28
* | | HSD #18020445323-2: arm: dts: Add comments for all accesses config in DTSTien Fong Chee2022-06-144-4/+17
* | | HSD #18020445323-1: doc: dtbinding: Improve doc descriptionTien Fong Chee2022-06-141-12/+382
* | | HSD #18016393902: doc: README.socfpga: Add Git branch releases conventionSin Hui Kho2022-06-141-10/+41
* | | HSD #18019787883: arm: socfpga: Expand the help text for the bridge command.Lokanathan, Raaj2022-06-141-2/+3
* | | HSD#15010839051: configs: increase CONFIG_SYS_BOOTM_LEN to supportKah Jing Lee2022-06-141-1/+1
* | | HSD#15010839051: configs: add env. variable to support compressed kernelKah Jing Lee2022-06-141-0/+2
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* | HSD #14015806978: arm: dts: a10: Remove hardcoded handoff info for A10 NAND &...Lokanathan, Raaj2022-05-198-1142/+134
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* doc: README.socfpga: Update for U-boot 2022.01rel_socfpga_v2022.01_RC_22.03.02_prLokanathan, Raaj2022-03-031-27/+6
* configs: socfpga: Follow mainline to rename SPL_CRC32_SUPPORT to SPL_CRC32Lokanathan, Raaj2022-01-273-3/+3
* Follow mainline to convert CONFIG_SYS_NAND_U_BOOT_LOCATIONS et al to KconfigLokanathan, Raaj2022-01-272-0/+3
* Follow mainline to convert CONFIG_SYS_LOAD_ADDR to KconfigLokanathan, Raaj2022-01-275-8/+16
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