index
:
delta/u-boot-socfpga.git
demo_sdram_ecc
dependabot/pip/doc/sphinx/certifi-2022.12.7
dependabot/pip/test/py/py-1.10.0
master
socfpga_agilex5-23.1_RC
socfpga_v2012.10
socfpga_v2013.01.01
socfpga_v2013.01.01-rel
socfpga_v2013.01.01-rel-amp
socfpga_v2013.01.01-rel14.0
socfpga_v2014.10_arria10_bringup
socfpga_v2017.09
socfpga_v2019.04
socfpga_v2019.10
socfpga_v2020.04
socfpga_v2020.04_vab
socfpga_v2020.07
socfpga_v2020.10
socfpga_v2020.10_RC
socfpga_v2021.01
socfpga_v2021.01_RC
socfpga_v2021.04
socfpga_v2021.04_RC
socfpga_v2021.07
socfpga_v2021.07_RC
socfpga_v2021.10
socfpga_v2021.10_RC
socfpga_v2022.01
socfpga_v2022.04
socfpga_v2022.07
socfpga_v2022.10
github.com: altera-opensource/u-boot-socfpga.git
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*
HSD #14014983934-4: arm: socfpga: soc64: Load and boot for NAND flash with UB...
rel_socfpga_v2021.07_RC_21.11.02_pr
socfpga_v2021.07_RC
Sin Hui Kho
2021-10-23
1
-5
/
+5
*
HSD #14014983934-3: arm: dts: Update NAND MTD partition for Agilex and Strati...
Sin Hui Kho
2021-10-23
2
-40
/
+4
*
HSD #14014983934-2: configs: defconfig: Update default NAND MTD partition for...
Sin Hui Kho
2021-10-23
4
-4
/
+4
*
HSD #14014983934-1: configs: defconfig: Enable UBI and UBIFS for Agilex and S...
Sin Hui Kho
2021-10-23
4
-4
/
+32
*
arm: socfpga: Export Board ID as U-boot Environment Variable
rel_socfpga_v2021.07_RC_21.11.01_pr
rel_socfpga_v2021.07_RC_21.10.03_pr
Yau Wai Gan
2021-10-05
1
-0
/
+7
*
arm: socfpga: Enable U-boot FIT Config Name Match with Board ID
Yau Wai Gan
2021-10-05
1
-5
/
+8
*
arm: socfpga: Add function to get Board ID
Yau Wai Gan
2021-10-05
2
-0
/
+39
*
HSD #1509353019: rsu: Ensure buffer 'flash0_string' not overflow
rel_socfpga_v2021.07_RC_21.10.02_pr
Sin Hui Kho
2021-09-28
1
-1
/
+1
*
HSD# 14014664649: arm: socfpga: n6010: add PLL initialization for Zarlink chip.
Matthew Gerlach
2021-09-20
2
-1
/
+346
*
HSD# 14014664649: arm: socfpga: n6010: add PLL data for Zarlink chip
Matthew Gerlach
2021-09-20
3
-0
/
+394
*
HSD# 14014664649: arm: socfpga: n6010: set bits-per-word for SPI device
Matthew Gerlach
2021-09-20
1
-0
/
+1
*
HSD# 14014664649: spi: designware: add support for bits-per-word DT binding
Matthew Gerlach
2021-09-20
1
-2
/
+14
*
HSD #14015124126: arm: socfpga: add configuration for n6010 board
rel_socfpga_v2021.07_RC_21.10.01_pr
Matthew Gerlach
2021-09-17
2
-0
/
+90
*
HSD #14015124126: arm: socfpga: add support for n6010 board
Matthew Gerlach
2021-09-17
4
-0
/
+86
*
HSD #14015124126: arm: socfpga: add device tree for n6010 board
Matthew Gerlach
2021-09-17
3
-0
/
+149
*
HSD #14015124126: arm: spl: socfpga: add support for booting directly from RAM
Matthew Gerlach
2021-09-17
1
-2
/
+12
*
HSD #1509829545-2: include: configs: soc64: Update source command format
rel_socfpga_v2021.07_RC_21.09.02_pr
rel_socfpga_v2021.07_RC_21.09.01_pr
Yau Wai Gan
2021-08-27
1
-1
/
+1
*
HSD #1509829545-1: arm: dts: soc64: Add U-boot script in FIT Image
Yau Wai Gan
2021-08-27
1
-0
/
+23
*
HSD #22011135953-5: arm: socfpga: Enhance checking on potential overwrite
Tien Fong Chee
2021-08-12
1
-3
/
+4
*
drivers: watchdog: wdt-uclass: Use IS_ENABLED for WATCHDOG_AUTOSTART
Teresa Remmet
2021-08-02
1
-1
/
+1
*
Revert arm: cp15: update DACR value to activate access control
Yau Wai Gan
2021-08-02
1
-5
/
+2
*
ddr: altera: n5x: Include DDR4 for the same hardcoding settings
Tien Fong Chee
2021-07-29
1
-15
/
+12
*
HSD #14014453708: intialize rsu for each command
Radu Bacrau
2021-07-29
1
-188
/
+123
*
command: Fix SMC and HVC maximum number of arguments
Siew Chin Lim
2021-07-29
1
-3
/
+3
*
Revert "socfpga64: Do not define CONFIG_SYS_MEM_RESERVE_SECURE to 0"
Yau Wai Gan
2021-07-29
1
-0
/
+1
*
include: configs: soc64: Disable SPL load U-Boot image using raw method
Sin Hui Kho
2021-07-29
1
-3
/
+0
*
arm: socfpga: soc64: Add support for board_boot_order()
Sin Hui Kho
2021-07-29
1
-0
/
+93
*
arm: dts: socfpga: soc64: Enable spl-boot-order Property in Device Tree
Sin Hui Kho
2021-07-29
11
-43
/
+15
*
arm: dts: socfpga: soc64: Consolidate SPL device trees
Sin Hui Kho
2021-07-29
5
-10
/
+8
*
configs: socfpga: soc64: Disable CONFIG_SPL_RAW_IMAGE_SUPPORT
Sin Hui Kho
2021-07-29
16
-0
/
+16
*
ddr: altera: n5x: Fixing debug log typo
Tien Fong Chee
2021-07-29
1
-6
/
+6
*
HSD #22011135953-4: arm: socfpga: Switch FW settings from codes to DTS
Tien Fong Chee
2021-07-29
13
-160
/
+20
*
HSD #22011135953-3: arm: dts: socfpga: Copy existing FW & SEC config to DTS
Tien Fong Chee
2021-07-29
4
-2
/
+151
*
HSD #22011135953-2: misc: socfpga_secreg: Enable register settings in DTS
Tien Fong Chee
2021-07-29
3
-0
/
+97
*
HSD #22011135953-1: doc: dtbinding: Add doc for privilege regs settings
Tien Fong Chee
2021-07-29
1
-0
/
+26
*
drivers: fpga: Add FPGA configuration during bootm for Intel SOCFPGA
Yau Wai Gan
2021-07-29
1
-0
/
+40
*
ddr: altera: n5x: Ensure 'cal->header.data_len' is validated
Tien Fong Chee
2021-07-29
1
-8
/
+36
*
ddr: altera: n5x: Ensure correct size of result for correct type casting
Tien Fong Chee
2021-07-29
1
-4
/
+4
*
ddr: altera: n5x: Copies calibration data to DDR when DDR retention is set
Tien Fong Chee
2021-07-29
1
-4
/
+7
*
ddr: altera: n5x: Return error if invalid DDR type is detected in argument
Tien Fong Chee
2021-07-29
1
-0
/
+3
*
HSD #18016722456: arm: socfpga: soc64: Fix with correct header file
Tien Fong Chee
2021-07-29
1
-1
/
+1
*
ddr: altera: n5x: Checking DDR init hang before reset due to watchdog
Tien Fong Chee
2021-07-29
1
-8
/
+21
*
ddr: altera: n5x: Checking DDR DBE
Tien Fong Chee
2021-07-29
1
-9
/
+24
*
arm: socfpga: n5x: Update DDR init progress bit
Tien Fong Chee
2021-07-29
1
-0
/
+16
*
arm: socfpga: Define the usage of boot scratch cold reg 8
Tien Fong Chee
2021-07-29
1
-0
/
+13
*
HSD #1308580006: arm: socfpga: soc64: Add malloc.h
Tien Fong Chee
2021-07-29
1
-4
/
+5
*
configs: socfpga: Wrapping up function ID for SMC register access
Tien Fong Chee
2021-07-29
1
-1
/
+4
*
arm: socfpga: n5x: Remove duplicate config
Tien Fong Chee
2021-07-29
1
-1
/
+0
*
drivers: fpga: intel_pr: enable illegal request detection
Chew, Chiau Ee
2021-07-29
1
-9
/
+45
*
HSD #14014209193: rsu: allow requesting any slot
Radu Bacrau
2021-07-29
1
-5
/
+0
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