diff options
author | Dinesh Maniyam <dinesh.maniyam@intel.com> | 2022-06-22 17:43:26 +0800 |
---|---|---|
committer | Lokanathan, Raaj <raaj.lokanathan@intel.com> | 2022-10-06 15:15:22 +0800 |
commit | 426051cbaacfb34cb0f6f1cb25a2ea843b5bfc26 (patch) | |
tree | 8a09ab00ce6cadf5eb5d7821f553babe2ad3b309 | |
parent | 5b128fdec95b4210db490b9c288dd014f8deb820 (diff) | |
download | u-boot-socfpga-426051cbaacfb34cb0f6f1cb25a2ea843b5bfc26.tar.gz |
HSD #18021819983: configs: socfpga: Change load address to 0x02000000
The load address is changed from 0x01000000 to 0x02000000
because the reserved space in Uboot is extended from 16MB to 32MB.
The default load address of 0x01000000 is no longer valid because
it is within the reserved region. Previously,
the reserved space is extended in Uboot for the consistent
alignment with Linux. These changes are applicable to n5x and Agilex.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
-rw-r--r-- | configs/socfpga_agilex_defconfig | 1 | ||||
-rw-r--r-- | configs/socfpga_agilex_n6010_defconfig | 1 | ||||
-rw-r--r-- | configs/socfpga_agilex_nand_legacy_defconfig | 1 | ||||
-rw-r--r-- | configs/socfpga_agilex_qspi_legacy_defconfig | 1 | ||||
-rw-r--r-- | configs/socfpga_n5x_defconfig | 1 | ||||
-rw-r--r-- | configs/socfpga_n5x_legacy_defconfig | 1 | ||||
-rw-r--r-- | configs/socfpga_n5x_vab_defconfig | 1 |
7 files changed, 7 insertions, 0 deletions
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 02df44e5cd..9ce3d3aa7b 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -19,6 +19,7 @@ CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 +CONFIG_SYS_LOAD_ADDR=0x02000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_NAND_BOOT=y CONFIG_QSPI_BOOT=y diff --git a/configs/socfpga_agilex_n6010_defconfig b/configs/socfpga_agilex_n6010_defconfig index f7fd358778..53c52203aa 100644 --- a/configs/socfpga_agilex_n6010_defconfig +++ b/configs/socfpga_agilex_n6010_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 +CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_DM_GPIO=y CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_TARGET_SOCFPGA_AGILEX_N6010=y diff --git a/configs/socfpga_agilex_nand_legacy_defconfig b/configs/socfpga_agilex_nand_legacy_defconfig index d1aec1b30b..efa9bfab77 100644 --- a/configs/socfpga_agilex_nand_legacy_defconfig +++ b/configs/socfpga_agilex_nand_legacy_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_CMD_MEMTEST=y diff --git a/configs/socfpga_agilex_qspi_legacy_defconfig b/configs/socfpga_agilex_qspi_legacy_defconfig index 99d46291e2..a6cc8cce7e 100644 --- a/configs/socfpga_agilex_qspi_legacy_defconfig +++ b/configs/socfpga_agilex_qspi_legacy_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x020C0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 +CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_DM_GPIO=y CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index ff58c80ac2..aa21625976 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -19,6 +19,7 @@ CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000 CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_CRC32=y CONFIG_SPL_LOAD_FIT=y +CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=5 diff --git a/configs/socfpga_n5x_legacy_defconfig b/configs/socfpga_n5x_legacy_defconfig index 60fbd54e84..5fdc6f47fb 100644 --- a/configs/socfpga_n5x_legacy_defconfig +++ b/configs/socfpga_n5x_legacy_defconfig @@ -36,6 +36,7 @@ CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex" CONFIG_HUSH_PARSER=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index 24380ef662..4f27370f9e 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 +CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_SECURE_VAB_AUTH=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y |