summaryrefslogtreecommitdiff
path: root/chromium/v8/src/compiler/mips
diff options
context:
space:
mode:
Diffstat (limited to 'chromium/v8/src/compiler/mips')
-rw-r--r--chromium/v8/src/compiler/mips/OWNERS5
-rw-r--r--chromium/v8/src/compiler/mips/code-generator-mips.cc68
-rw-r--r--chromium/v8/src/compiler/mips/instruction-selector-mips.cc8
3 files changed, 61 insertions, 20 deletions
diff --git a/chromium/v8/src/compiler/mips/OWNERS b/chromium/v8/src/compiler/mips/OWNERS
index 3f8fbfc7c80..978563cab5e 100644
--- a/chromium/v8/src/compiler/mips/OWNERS
+++ b/chromium/v8/src/compiler/mips/OWNERS
@@ -1,3 +1,2 @@
-ivica.bogosavljevic@imgtec.com
-Miran.Karic@imgtec.com
-dusan.simicic@imgtec.com
+ivica.bogosavljevic@mips.com
+Miran.Karic@mips.com
diff --git a/chromium/v8/src/compiler/mips/code-generator-mips.cc b/chromium/v8/src/compiler/mips/code-generator-mips.cc
index e6264bc2b49..b7301749cfb 100644
--- a/chromium/v8/src/compiler/mips/code-generator-mips.cc
+++ b/chromium/v8/src/compiler/mips/code-generator-mips.cc
@@ -273,14 +273,8 @@ class OutOfLineRecordWrite final : public OutOfLineCode {
// We need to save and restore ra if the frame was elided.
__ Push(ra);
}
-#ifdef V8_CSA_WRITE_BARRIER
__ CallRecordWriteStub(object_, scratch1_, remembered_set_action,
save_fp_mode);
-#else
- __ CallStubDelayed(
- new (zone_) RecordWriteStub(nullptr, object_, scratch0_, scratch1_,
- remembered_set_action, save_fp_mode));
-#endif
if (must_save_lr_) {
__ Pop(ra);
}
@@ -745,7 +739,7 @@ void CodeGenerator::AssembleTailCallAfterGap(Instruction* instr,
// to:
// 1. load the address of the current instruction;
// 2. read from memory the word that contains that bit, which can be found in
-// the first set of flags ({kKindSpecificFlags1Offset});
+// the flags in the referenced {CodeDataContainer} object;
// 3. test kMarkedForDeoptimizationBit in those flags; and
// 4. if it is not zero then it jumps to the builtin.
void CodeGenerator::BailoutIfDeoptimized() {
@@ -759,9 +753,10 @@ void CodeGenerator::BailoutIfDeoptimized() {
__ nop();
int pc = __ pc_offset();
__ bind(&current);
- int offset = Code::kKindSpecificFlags1Offset - (Code::kHeaderSize + pc);
+ int offset = Code::kCodeDataContainerOffset - (Code::kHeaderSize + pc);
__ lw(a2, MemOperand(ra, offset));
__ pop(ra);
+ __ lw(a2, FieldMemOperand(a2, CodeDataContainer::kKindSpecificFlagsOffset));
__ And(a2, a2, Operand(1 << Code::kMarkedForDeoptimizationBit));
Handle<Code> code = isolate()->builtins()->builtin_handle(
Builtins::kCompileLazyDeoptimizedCode);
@@ -785,6 +780,19 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
frame_access_state()->ClearSPDelta();
break;
}
+ case kArchCallWasmFunction: {
+ if (instr->InputAt(0)->IsImmediate()) {
+ Address wasm_code = reinterpret_cast<Address>(
+ i.ToConstant(instr->InputAt(0)).ToInt32());
+ __ Call(wasm_code, info()->IsWasm() ? RelocInfo::WASM_CALL
+ : RelocInfo::JS_TO_WASM_CALL);
+ } else {
+ __ Call(at, i.InputRegister(0), 0);
+ }
+ RecordCallPosition(instr);
+ frame_access_state()->ClearSPDelta();
+ break;
+ }
case kArchTailCallCodeObjectFromJSFunction:
case kArchTailCallCodeObject: {
if (arch_opcode == kArchTailCallCodeObjectFromJSFunction) {
@@ -801,6 +809,19 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
frame_access_state()->SetFrameAccessToDefault();
break;
}
+ case kArchTailCallWasm: {
+ if (instr->InputAt(0)->IsImmediate()) {
+ Address wasm_code = reinterpret_cast<Address>(
+ i.ToConstant(instr->InputAt(0)).ToInt32());
+ __ Jump(wasm_code, info()->IsWasm() ? RelocInfo::WASM_CALL
+ : RelocInfo::JS_TO_WASM_CALL);
+ } else {
+ __ Jump(at, i.InputRegister(0), 0);
+ }
+ frame_access_state()->ClearSPDelta();
+ frame_access_state()->SetFrameAccessToDefault();
+ break;
+ }
case kArchTailCallAddress: {
CHECK(!instr->InputAt(0)->IsImmediate());
__ Jump(i.InputRegister(0));
@@ -2572,9 +2593,26 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
if (src0 == src1) {
// Unary S32x4 shuffles are handled with shf.w instruction
+ unsigned lane = shuffle & 0xff;
+ if (FLAG_debug_code) {
+ // range of all four lanes, for unary instruction,
+ // should belong to the same range, which can be one of these:
+ // [0, 3] or [4, 7]
+ if (lane >= 4) {
+ int32_t shuffle_helper = shuffle;
+ for (int i = 0; i < 4; ++i) {
+ lane = shuffle_helper & 0xff;
+ CHECK_GE(lane, 4);
+ shuffle_helper >>= 8;
+ }
+ }
+ }
uint32_t i8 = 0;
for (int i = 0; i < 4; i++) {
- int lane = shuffle & 0xff;
+ lane = shuffle & 0xff;
+ if (lane >= 4) {
+ lane -= 4;
+ }
DCHECK_GT(4, lane);
i8 |= lane << (2 * i);
shuffle >>= 8;
@@ -3365,7 +3403,7 @@ void CodeGenerator::FinishFrame(Frame* frame) {
}
if (saves_fpu != 0) {
- int count = base::bits::CountPopulation32(saves_fpu);
+ int count = base::bits::CountPopulation(saves_fpu);
DCHECK_EQ(kNumCalleeSavedFPU, count);
frame->AllocateSavedCalleeRegisterSlots(count *
(kDoubleSize / kPointerSize));
@@ -3373,7 +3411,7 @@ void CodeGenerator::FinishFrame(Frame* frame) {
const RegList saves = descriptor->CalleeSavedRegisters();
if (saves != 0) {
- int count = base::bits::CountPopulation32(saves);
+ int count = base::bits::CountPopulation(saves);
DCHECK_EQ(kNumCalleeSaved, count + 1);
frame->AllocateSavedCalleeRegisterSlots(count);
}
@@ -3411,7 +3449,12 @@ void CodeGenerator::AssembleConstructFrame() {
shrink_slots -= osr_helper()->UnoptimizedFrameSlots();
}
+ const RegList saves = descriptor->CalleeSavedRegisters();
const RegList saves_fpu = descriptor->CalleeSavedFPRegisters();
+
+ // Skip callee-saved slots, which are pushed below.
+ shrink_slots -= base::bits::CountPopulation(saves);
+ shrink_slots -= 2 * base::bits::CountPopulation(saves_fpu);
if (shrink_slots > 0) {
__ Subu(sp, sp, Operand(shrink_slots * kPointerSize));
}
@@ -3421,11 +3464,10 @@ void CodeGenerator::AssembleConstructFrame() {
__ MultiPushFPU(saves_fpu);
}
- const RegList saves = descriptor->CalleeSavedRegisters();
if (saves != 0) {
// Save callee-saved registers.
__ MultiPush(saves);
- DCHECK_EQ(kNumCalleeSaved, base::bits::CountPopulation32(saves) + 1);
+ DCHECK_EQ(kNumCalleeSaved, base::bits::CountPopulation(saves) + 1);
}
}
diff --git a/chromium/v8/src/compiler/mips/instruction-selector-mips.cc b/chromium/v8/src/compiler/mips/instruction-selector-mips.cc
index 5bb112f77ec..1053763f0d9 100644
--- a/chromium/v8/src/compiler/mips/instruction-selector-mips.cc
+++ b/chromium/v8/src/compiler/mips/instruction-selector-mips.cc
@@ -421,7 +421,7 @@ void InstructionSelector::VisitWord32And(Node* node) {
if (m.left().IsWord32Shr() && CanCover(node, m.left().node()) &&
m.right().HasValue()) {
uint32_t mask = m.right().Value();
- uint32_t mask_width = base::bits::CountPopulation32(mask);
+ uint32_t mask_width = base::bits::CountPopulation(mask);
uint32_t mask_msb = base::bits::CountLeadingZeros32(mask);
if ((mask_width != 0) && (mask_msb + mask_width == 32)) {
// The mask must be contiguous, and occupy the least-significant bits.
@@ -454,7 +454,7 @@ void InstructionSelector::VisitWord32And(Node* node) {
}
if (m.right().HasValue()) {
uint32_t mask = m.right().Value();
- uint32_t shift = base::bits::CountPopulation32(~mask);
+ uint32_t shift = base::bits::CountPopulation(~mask);
uint32_t msb = base::bits::CountLeadingZeros32(~mask);
if (shift != 0 && shift != 32 && msb + shift == 32) {
// Insert zeros for (x >> K) << K => x & ~(2^K - 1) expression reduction
@@ -507,7 +507,7 @@ void InstructionSelector::VisitWord32Shl(Node* node) {
// contiguous, and the shift immediate non-zero.
if (mleft.right().HasValue()) {
uint32_t mask = mleft.right().Value();
- uint32_t mask_width = base::bits::CountPopulation32(mask);
+ uint32_t mask_width = base::bits::CountPopulation(mask);
uint32_t mask_msb = base::bits::CountLeadingZeros32(mask);
if ((mask_width != 0) && (mask_msb + mask_width == 32)) {
uint32_t shift = m.right().Value();
@@ -537,7 +537,7 @@ void InstructionSelector::VisitWord32Shr(Node* node) {
// Select Ext for Shr(And(x, mask), imm) where the result of the mask is
// shifted into the least-significant bits.
uint32_t mask = (mleft.right().Value() >> lsb) << lsb;
- unsigned mask_width = base::bits::CountPopulation32(mask);
+ unsigned mask_width = base::bits::CountPopulation(mask);
unsigned mask_msb = base::bits::CountLeadingZeros32(mask);
if ((mask_msb + mask_width + lsb) == 32) {
MipsOperandGenerator g(this);
View Lorry Controller Status