diff options
Diffstat (limited to 'chromium/v8/src/codegen/mips')
4 files changed, 75 insertions, 27 deletions
diff --git a/chromium/v8/src/codegen/mips/assembler-mips.cc b/chromium/v8/src/codegen/mips/assembler-mips.cc index 768b16b86c4..19a514b2d9d 100644 --- a/chromium/v8/src/codegen/mips/assembler-mips.cc +++ b/chromium/v8/src/codegen/mips/assembler-mips.cc @@ -3568,17 +3568,20 @@ void Assembler::GrowBuffer() { void Assembler::db(uint8_t data) { CheckForEmitInForbiddenSlot(); - EmitHelper(data); + *reinterpret_cast<uint8_t*>(pc_) = data; + pc_ += sizeof(uint8_t); } void Assembler::dd(uint32_t data) { CheckForEmitInForbiddenSlot(); - EmitHelper(data); + *reinterpret_cast<uint32_t*>(pc_) = data; + pc_ += sizeof(uint32_t); } void Assembler::dq(uint64_t data) { CheckForEmitInForbiddenSlot(); - EmitHelper(data); + *reinterpret_cast<uint64_t*>(pc_) = data; + pc_ += sizeof(uint64_t); } void Assembler::dd(Label* label) { @@ -3652,8 +3655,12 @@ void Assembler::CheckTrampolinePool() { } } } - bind(&after_pool); + // If unbound_labels_count_ is big enough, label after_pool will + // need a trampoline too, so we must create the trampoline before + // the bind operation to make sure function 'bind' can get this + // information. trampoline_ = Trampoline(pool_start, unbound_labels_count_); + bind(&after_pool); trampoline_emitted_ = true; // As we are only going to emit trampoline once, we need to prevent any @@ -3794,6 +3801,7 @@ void Assembler::GenPCRelativeJumpAndLink(Register t, int32_t imm32, addu(t, ra, t); jalr(t); if (bdslot == PROTECT) nop(); + set_last_call_pc_(pc_); } UseScratchRegisterScope::UseScratchRegisterScope(Assembler* assembler) diff --git a/chromium/v8/src/codegen/mips/assembler-mips.h b/chromium/v8/src/codegen/mips/assembler-mips.h index a414168a9f3..248bd1ac751 100644 --- a/chromium/v8/src/codegen/mips/assembler-mips.h +++ b/chromium/v8/src/codegen/mips/assembler-mips.h @@ -170,6 +170,35 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase { // Unused on this architecture. void MaybeEmitOutOfLineConstantPool() {} + // Mips uses BlockTrampolinePool to prevent generating trampoline inside a + // continuous instruction block. For Call instrution, it prevents generating + // trampoline between jalr and delay slot instruction. In the destructor of + // BlockTrampolinePool, it must check if it needs to generate trampoline + // immediately, if it does not do this, the branch range will go beyond the + // max branch offset, that means the pc_offset after call CheckTrampolinePool + // may be not the Call instruction's location. So we use last_call_pc here for + // safepoint record. + int pc_offset_for_safepoint() { +#ifdef DEBUG + Instr instr1 = + instr_at(static_cast<int>(last_call_pc_ - buffer_start_ - kInstrSize)); + Instr instr2 = instr_at( + static_cast<int>(last_call_pc_ - buffer_start_ - kInstrSize * 2)); + if (GetOpcodeField(instr1) != SPECIAL) { // instr1 == jialc. + DCHECK(IsMipsArchVariant(kMips32r6) && GetOpcodeField(instr1) == POP76 && + GetRs(instr1) == 0); + } else { + if (GetFunctionField(instr1) == SLL) { // instr1 == nop, instr2 == jalr. + DCHECK(GetOpcodeField(instr2) == SPECIAL && + GetFunctionField(instr2) == JALR); + } else { // instr1 == jalr. + DCHECK(GetFunctionField(instr1) == JALR); + } + } +#endif + return static_cast<int>(last_call_pc_ - buffer_start_); + } + // Label operations & relative jumps (PPUM Appendix D). // // Takes a branch opcode (cc) and a label (L) and generates @@ -1593,6 +1622,8 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase { void GenPCRelativeJumpAndLink(Register t, int32_t imm32, RelocInfo::Mode rmode, BranchDelaySlot bdslot); + void set_last_call_pc_(byte* pc) { last_call_pc_ = pc; } + private: // Avoid overflows for displacements etc. static const int kMaximalBufferSize = 512 * MB; @@ -1856,6 +1887,11 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase { Trampoline trampoline_; bool internal_trampoline_exception_; + // Keep track of the last Call's position to ensure that safepoint can get the + // correct information even if there is a trampoline immediately after the + // Call. + byte* last_call_pc_; + private: void AllocateAndInstallRequestedHeapObjects(Isolate* isolate); diff --git a/chromium/v8/src/codegen/mips/interface-descriptors-mips.cc b/chromium/v8/src/codegen/mips/interface-descriptors-mips.cc index 6770ab5cce8..c092ebc2c75 100644 --- a/chromium/v8/src/codegen/mips/interface-descriptors-mips.cc +++ b/chromium/v8/src/codegen/mips/interface-descriptors-mips.cc @@ -39,14 +39,6 @@ void WasmI32AtomicWait32Descriptor::InitializePlatformSpecific( data->InitializePlatformSpecific(kParameterCount, default_stub_registers); } -void WasmI32AtomicWait64Descriptor::InitializePlatformSpecific( - CallInterfaceDescriptorData* data) { - const Register default_stub_registers[] = {a0, a1, a2}; - CHECK_EQ(static_cast<size_t>(kParameterCount), - arraysize(default_stub_registers)); - data->InitializePlatformSpecific(kParameterCount, default_stub_registers); -} - void WasmI64AtomicWait32Descriptor::InitializePlatformSpecific( CallInterfaceDescriptorData* data) { const Register default_stub_registers[] = {a0, a1, a2, a3, t0}; @@ -56,14 +48,6 @@ void WasmI64AtomicWait32Descriptor::InitializePlatformSpecific( default_stub_registers); } -void WasmI64AtomicWait64Descriptor::InitializePlatformSpecific( - CallInterfaceDescriptorData* data) { - const Register default_stub_registers[] = {a0, a1, a2}; - CHECK_EQ(static_cast<size_t>(kParameterCount), - arraysize(default_stub_registers)); - data->InitializePlatformSpecific(kParameterCount, default_stub_registers); -} - void RecordWriteDescriptor::InitializePlatformSpecific( CallInterfaceDescriptorData* data) { const Register default_stub_registers[] = {a0, a1, a2, a3, kReturnRegister0}; @@ -233,12 +217,6 @@ void AbortDescriptor::InitializePlatformSpecific( data->InitializePlatformSpecific(arraysize(registers), registers); } -void AllocateHeapNumberDescriptor::InitializePlatformSpecific( - CallInterfaceDescriptorData* data) { - // register state - data->InitializePlatformSpecific(0, nullptr); -} - void CompareDescriptor::InitializePlatformSpecific( CallInterfaceDescriptorData* data) { Register registers[] = {a1, a0}; @@ -338,6 +316,30 @@ void CallTrampoline_WithFeedbackDescriptor::InitializePlatformSpecific( DefaultInitializePlatformSpecific(data, 4); } +void CallWithArrayLike_WithFeedbackDescriptor::InitializePlatformSpecific( + CallInterfaceDescriptorData* data) { + // TODO(v8:8888): Implement on this platform. + DefaultInitializePlatformSpecific(data, 4); +} + +void CallWithSpread_WithFeedbackDescriptor::InitializePlatformSpecific( + CallInterfaceDescriptorData* data) { + // TODO(v8:8888): Implement on this platform. + DefaultInitializePlatformSpecific(data, 4); +} + +void ConstructWithArrayLike_WithFeedbackDescriptor::InitializePlatformSpecific( + CallInterfaceDescriptorData* data) { + // TODO(v8:8888): Implement on this platform. + DefaultInitializePlatformSpecific(data, 4); +} + +void ConstructWithSpread_WithFeedbackDescriptor::InitializePlatformSpecific( + CallInterfaceDescriptorData* data) { + // TODO(v8:8888): Implement on this platform. + DefaultInitializePlatformSpecific(data, 4); +} + void Compare_WithFeedbackDescriptor::InitializePlatformSpecific( CallInterfaceDescriptorData* data) { // TODO(v8:8888): Implement on this platform. diff --git a/chromium/v8/src/codegen/mips/macro-assembler-mips.cc b/chromium/v8/src/codegen/mips/macro-assembler-mips.cc index 48b2acf4562..efb2dc11e1f 100644 --- a/chromium/v8/src/codegen/mips/macro-assembler-mips.cc +++ b/chromium/v8/src/codegen/mips/macro-assembler-mips.cc @@ -3906,6 +3906,7 @@ void TurboAssembler::Call(Register target, int16_t offset, Condition cond, // Emit a nop in the branch delay slot if required. if (bd == PROTECT) nop(); } + set_last_call_pc_(pc_); } // Note: To call gcc-compiled C code on mips, you must call through t9. @@ -3938,6 +3939,7 @@ void TurboAssembler::Call(Register target, Register base, int16_t offset, // Emit a nop in the branch delay slot if required. if (bd == PROTECT) nop(); } + set_last_call_pc_(pc_); } void TurboAssembler::Call(Address target, RelocInfo::Mode rmode, Condition cond, @@ -5427,7 +5429,7 @@ void TurboAssembler::CallCFunctionHelper(Register function_base, void TurboAssembler::CheckPageFlag(Register object, Register scratch, int mask, Condition cc, Label* condition_met) { And(scratch, object, Operand(~kPageAlignmentMask)); - lw(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset)); + lw(scratch, MemOperand(scratch, BasicMemoryChunk::kFlagsOffset)); And(scratch, scratch, Operand(mask)); Branch(condition_met, cc, scratch, Operand(zero_reg)); } |