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authorAllan Sandfeld Jensen <allan.jensen@qt.io>2020-10-12 14:27:29 +0200
committerAllan Sandfeld Jensen <allan.jensen@qt.io>2020-10-13 09:35:20 +0000
commitc30a6232df03e1efbd9f3b226777b07e087a1122 (patch)
treee992f45784689f373bcc38d1b79a239ebe17ee23 /chromium/v8/src/codegen/arm64/macro-assembler-arm64.h
parent7b5b123ac58f58ffde0f4f6e488bcd09aa4decd3 (diff)
downloadqtwebengine-chromium-85-based.tar.gz
BASELINE: Update Chromium to 85.0.4183.14085-based
Change-Id: Iaa42f4680837c57725b1344f108c0196741f6057 Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
Diffstat (limited to 'chromium/v8/src/codegen/arm64/macro-assembler-arm64.h')
-rw-r--r--chromium/v8/src/codegen/arm64/macro-assembler-arm64.h26
1 files changed, 16 insertions, 10 deletions
diff --git a/chromium/v8/src/codegen/arm64/macro-assembler-arm64.h b/chromium/v8/src/codegen/arm64/macro-assembler-arm64.h
index 109e73c3c22..0cb9e823198 100644
--- a/chromium/v8/src/codegen/arm64/macro-assembler-arm64.h
+++ b/chromium/v8/src/codegen/arm64/macro-assembler-arm64.h
@@ -503,13 +503,13 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
void Cbnz(const Register& rt, Label* label);
void Cbz(const Register& rt, Label* label);
- void Paciasp() {
+ void Pacibsp() {
DCHECK(allow_macro_instructions_);
- paciasp();
+ pacibsp();
}
- void Autiasp() {
+ void Autibsp() {
DCHECK(allow_macro_instructions_);
- autiasp();
+ autibsp();
}
// The 1716 pac and aut instructions encourage people to use x16 and x17
@@ -519,7 +519,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
// Register temp = temps.AcquireX(); // temp will be x16
// __ Mov(x17, ptr);
// __ Mov(x16, modifier); // Will override temp!
- // __ Pacia1716();
+ // __ Pacib1716();
//
// To work around this issue, you must exclude x16 and x17 from the scratch
// register list. You may need to replace them with other registers:
@@ -529,18 +529,18 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
// temps.Include(x10, x11);
// __ Mov(x17, ptr);
// __ Mov(x16, modifier);
- // __ Pacia1716();
- void Pacia1716() {
+ // __ Pacib1716();
+ void Pacib1716() {
DCHECK(allow_macro_instructions_);
DCHECK(!TmpList()->IncludesAliasOf(x16));
DCHECK(!TmpList()->IncludesAliasOf(x17));
- pacia1716();
+ pacib1716();
}
- void Autia1716() {
+ void Autib1716() {
DCHECK(allow_macro_instructions_);
DCHECK(!TmpList()->IncludesAliasOf(x16));
DCHECK(!TmpList()->IncludesAliasOf(x17));
- autia1716();
+ autib1716();
}
inline void Dmb(BarrierDomain domain, BarrierType type);
@@ -1009,6 +1009,12 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
fcvtzs(vd, vn, fbits);
}
+ void Fjcvtzs(const Register& rd, const VRegister& vn) {
+ DCHECK(allow_macro_instructions());
+ DCHECK(!rd.IsZero());
+ fjcvtzs(rd, vn);
+ }
+
inline void Fcvtzu(const Register& rd, const VRegister& fn);
void Fcvtzu(const VRegister& vd, const VRegister& vn, int fbits = 0) {
DCHECK(allow_macro_instructions());