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| author | Jason Thorpe <thorpej@me.com> | 2021-06-05 17:29:30 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-06-05 17:29:30 -0700 |
| commit | 7accd8de6bdf8efad1b18cb82aba58f691e51213 (patch) | |
| tree | 34c4c9c6ae172b4b6ba7b08801425d99c00b8be0 | |
| parent | 90e70ede8a5717323d13a304e89d04dead32dc02 (diff) | |
| download | qemu-palcode-7accd8de6bdf8efad1b18cb82aba58f691e51213.tar.gz | |
Tidy comment re CY82C693UB vs PIIX
Signed-off-by: Jason Thorpe <thorpej@me.com>
Message-Id: <20210603035317.6814-4-thorpej@me.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | init.c | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -272,7 +272,7 @@ init_i8259 (void) outb(0x04, PORT_PIC1_DATA); /* ICW3: slave control INTC2 */ outb(0x01, PORT_PIC1_DATA); /* ICW4 */ - /* Initialize level triggers. The CY82C693UB that's on real alpha + /* Initialize level triggers. The CY82C693UB that's on some real alpha hardware doesn't have this; this is a PIIX extension. However, QEMU doesn't implement regular level triggers. */ outb(0xff, PORT_PIC2_ELCR); |