tests/examplefiles/verilog/example_coq.v.output


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'Lemma'       Name
' '           Text
'FalseLemma'  Name
' '           Text
':'           Operator
' '           Text
'False'       Name
' '           Text
'<'           Operator
'-'           Operator
'>'           Operator
' '           Text
'False'       Name
'.'           Punctuation
'\n'          Text

'tauto'       Name
'.'           Punctuation
'\n'          Text

'Qed'         Name
'.'           Punctuation
'\n'          Text

'Check'       Name
' '           Text
'FalseLemma'  Name
'.'           Punctuation
'\n'          Text