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* Improve HTML formatter output.improve-linenos-handlingMatthäus G. Chajdas2020-07-3165-836/+712
* Fix Arrow lexer module docstring (#1499)Ken2020-07-301-1/+1
* Improve Markdown lexer (#1495)Leistungsabfall2020-07-212-21/+557
* Fix Solarized line number colors (#1477)Paweł Fertyk2020-07-0471-129/+1223
* Add support for PowerShell Remoting sessions (#1398)Geert Smelt2020-06-302-2/+30
* Add Arrow lexer (#1481)Ken2020-06-213-0/+176
* Merge pull request #1478 from cool-RR/2020-06-11-raise-fromGeorg Brandl2020-06-201-3/+3
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| * Fix exception causes in lexer.pyRam Rachum2020-06-111-3/+3
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* Improve SystemVerilog class/endclass lexer rules (#1471)Chris Drake2020-06-062-8/+103
* Updated languages list with more links (#1472)Rys Sommefeldt2020-06-031-129/+129
* Remove .vscode folder.Matthäus G. Chajdas2020-06-022-6/+1
* Update CHAGES, language list.Matthäus G. Chajdas2020-06-012-2/+8
* add Singularity lexer (#1285)Georg Brandl2020-06-013-2/+81
* Nasm: Update register syntax for 64-bit (#1465)Jonas Bushart2020-06-011-1/+1
* SystemVerilog keyword/operator improvements (#1464)Chris Drake2020-06-012-14/+269
* add myself as author of the TiddlyWiki5 lexer (#1469)Max2020-06-011-0/+1
* Use the checkout@v2 action.Matthäus G. Chajdas2020-06-011-2/+2
* Use python3 in Makefile (fixes #1440.)Matthäus G. Chajdas2020-06-011-1/+1
* Add GDScript lexer (#1457)Paweł Fertyk2020-06-017-2/+639
* Merge pull request #1467 from EmreAtes/masterGeorg Brandl2020-05-291-2/+7
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| * Added separate lifetime lexing for RustEmre Ates2020-05-291-2/+7
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* Merge pull request #1442 from amanotk/masterGeorg Brandl2020-05-271-4/+4
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| * fixed fortran literal regex patternTakanobu Amano2020-05-051-4/+4
* | Merge pull request #1463 from cjdrake/refactorGeorg Brandl2020-05-271-250/+252
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| * | Refactor SystemVerilog unit testsChris Drake2020-05-261-250/+252
* | | Merge pull request #1462 from cjdrake/fix-worGeorg Brandl2020-05-271-1/+1
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| * | Change Verilog 'wo' to 'wor'Chris Drake2020-05-261-1/+1
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* | Update CHANGES.Matthäus G. Chajdas2020-05-261-0/+1
* | Update `Inform6Lexer` to Inform 6.34 (#1461)David Corbett2020-05-262-19/+29
* | Update CHANGES, documentation.Matthäus G. Chajdas2020-05-262-1/+7
* | Add lexer for Devicetree language (#1434)Maxime Chretien2020-05-264-0/+271
* | Update CHANGES.Matthäus G. Chajdas2020-05-261-1/+1
* | Update SystemVerilog literal constants (#1460)Chris Drake2020-05-262-14/+158
* | Update CHANGES.Matthäus G. Chajdas2020-05-241-0/+2
* | Add support for .tid files (TiddlyWiki5) (#1390)Max2020-05-243-1/+233
* | Update CHANGES.Matthäus G. Chajdas2020-05-221-1/+1
* | Merge branch 'master' of https://github.com/pygments/pygmentsMatthäus G. Chajdas2020-05-222-28/+32
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| * | Fix a few SystemVerilog type keywords (#1454)Chris Drake2020-05-222-28/+32
* | | Update CHANGES, simplify analyse_text.Matthäus G. Chajdas2020-05-223-1/+7
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* | Update the Tera Term macro lexer (new 'setspeed' command) (#1337)Kurt McKee2020-05-221-46/+226
* | Update CHANGES.Matthäus G. Chajdas2020-05-221-0/+2
* | General improvement to the C/C++ lexer (#1350)Hubert Gruniaux2020-05-223-41/+128
* | Update CHANGES.Matthäus G. Chajdas2020-05-221-0/+11
* | Configs lexer: Allow Kconfig derivate names (#1458)Maxime Chretien2020-05-202-2/+2
* | Make HttpLexer compatible with RFC 7230 (section 3.1.2). Specifically this a...Joshua Huber2020-05-182-1/+15
* | Add recent keywords for Dart syntax (#1449)Sam Rawlins2020-05-181-9/+10
* | Add a basic SystemVerilog unit test (#1452)Chris Drake2020-05-181-0/+207
* | Python 3: remove "cmp" builtinGeorg Brandl2020-05-081-1/+1
* | Matlabsession line continuation (#1399)Bryan W. Weber2020-05-062-16/+244
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* Merge pull request #1441 from whitequark/verilog-escaped-identGeorg Brandl2020-05-041-0/+2
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