Commit message (Expand) | Author | Age | Files | Lines | |
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* | ENH, SIMD: Discard non-signaling comparison intrinsics | Sayed Adel | 2022-12-15 | 1 | -0/+3 |
* | SIMD: Add new intrinsics to check true cross all vector lanes | Sayed Adel | 2022-09-19 | 1 | -0/+4 |
* | ENH, SIMD: Extend universal intrinsics to support IBMZ | Sayed Adel | 2022-06-04 | 1 | -4/+14 |
* | BUG, SIMD: Workaround broadcasting SIMD 64-bit integers on MSVC 32-bit mode | Sayed Adel | 2021-10-28 | 1 | -0/+19 |
* | SIMD: add NPYV intrinsics that compute the parameters used for fast integer d... | Sayed Adel | 2021-03-08 | 1 | -0/+5 |
* | ENH, SIMD: Add new NPYV intrinsics pack(1) | Sayed Adel | 2020-12-22 | 1 | -0/+7 |
* | ENH, SIMD: Add partial/non-contig load and store intrinsics for 32/64-bit | Sayed Adel | 2020-10-09 | 1 | -0/+49 |
* | ENH: [2/4] implement the NumPy C SIMD vectorization interface | Sayed Adel | 2020-07-08 | 1 | -0/+1 |
* | ENH: [1/4] implement the NumPy C SIMD vectorization interface | Sayed Adel | 2020-07-08 | 1 | -0/+55 |