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authorSayed Adel <seiko@imavr.com>2023-02-03 12:41:50 +0200
committerSayed Adel <seiko@imavr.com>2023-02-20 04:07:15 +0200
commit866f41a85bddfa3ea6de551bb27f335b0f8a6a52 (patch)
tree4b2ad41ca058771c05ed7688ad8ee5a331fd05bc /numpy/core/setup_common.py
parent86450a0cd79a8107453f1b9aeb629e52c388efcc (diff)
downloadnumpy-866f41a85bddfa3ea6de551bb27f335b0f8a6a52.tar.gz
MAINT, SIMD: Removes compiler definitions of attribute-based CPU dispatching
Diffstat (limited to 'numpy/core/setup_common.py')
-rw-r--r--numpy/core/setup_common.py56
1 files changed, 0 insertions, 56 deletions
diff --git a/numpy/core/setup_common.py b/numpy/core/setup_common.py
index 0512457f4..ef8d21fa7 100644
--- a/numpy/core/setup_common.py
+++ b/numpy/core/setup_common.py
@@ -183,25 +183,7 @@ OPTIONAL_INTRINSICS = [("__builtin_isnan", '5.'),
# Test `long long` for arm+clang 13 (gh-22811,
# but we use all versions of __builtin_mul_overflow):
("__builtin_mul_overflow", '(long long)5, 5, (int*)5'),
- # MMX only needed for icc, but some clangs don't have it
- ("_m_from_int64", '0', "emmintrin.h"),
- ("_mm_load_ps", '(float*)0', "xmmintrin.h"), # SSE
- ("_mm_prefetch", '(float*)0, _MM_HINT_NTA',
- "xmmintrin.h"), # SSE
- ("_mm_load_pd", '(double*)0', "emmintrin.h"), # SSE2
("__builtin_prefetch", "(float*)0, 0, 3"),
- # check that the linker can handle avx
- ("__asm__ volatile", '"vpand %xmm1, %xmm2, %xmm3"',
- "stdio.h", "LINK_AVX"),
- ("__asm__ volatile", '"vpand %ymm1, %ymm2, %ymm3"',
- "stdio.h", "LINK_AVX2"),
- ("__asm__ volatile", '"vpaddd %zmm1, %zmm2, %zmm3"',
- "stdio.h", "LINK_AVX512F"),
- ("__asm__ volatile", '"vfpclasspd $0x40, %zmm15, %k6\\n"\
- "vmovdqu8 %xmm0, %xmm1\\n"\
- "vpbroadcastmb2q %k0, %xmm0\\n"',
- "stdio.h", "LINK_AVX512_SKX"),
- ("__asm__ volatile", '"xgetbv"', "stdio.h", "XGETBV"),
]
# function attributes
@@ -216,44 +198,6 @@ OPTIONAL_FUNCTION_ATTRIBUTES = [('__attribute__((optimize("unroll-loops")))',
('__attribute__((nonnull (1)))',
'attribute_nonnull'),
]
-
-OPTIONAL_FUNCTION_ATTRIBUTES_AVX = [('__attribute__((target ("avx")))',
- 'attribute_target_avx'),
- ('__attribute__((target ("avx2")))',
- 'attribute_target_avx2'),
- ('__attribute__((target ("avx512f")))',
- 'attribute_target_avx512f'),
- ('__attribute__((target ("avx512f,avx512dq,avx512bw,avx512vl,avx512cd")))',
- 'attribute_target_avx512_skx'),
- ]
-
-# function attributes with intrinsics
-# To ensure your compiler can compile avx intrinsics with just the attributes
-# gcc 4.8.4 support attributes but not with intrisics
-# tested via "#include<%s> int %s %s(void *){code; return 0;};" % (header, attribute, name, code)
-# function name will be converted to HAVE_<upper-case-name> preprocessor macro
-# The _mm512_castps_si512 instruction is specific check for AVX-512F support
-# in gcc-4.9 which is missing a subset of intrinsics. See
-# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61878
-OPTIONAL_FUNCTION_ATTRIBUTES_WITH_INTRINSICS_AVX = [
- ('__attribute__((target("avx2,fma")))',
- 'attribute_target_avx2_with_intrinsics',
- '__m256 temp = _mm256_set1_ps(1.0); temp = \
- _mm256_fmadd_ps(temp, temp, temp)',
- 'immintrin.h'),
- ('__attribute__((target("avx512f")))',
- 'attribute_target_avx512f_with_intrinsics',
- '__m512i temp = _mm512_castps_si512(_mm512_set1_ps(1.0))',
- 'immintrin.h'),
- ('__attribute__((target ("avx512f,avx512dq,avx512bw,avx512vl,avx512cd")))',
- 'attribute_target_avx512_skx_with_intrinsics',
- '__mmask8 temp = _mm512_fpclass_pd_mask(_mm512_set1_pd(1.0), 0x01);\
- __m512i unused_temp = \
- _mm512_castps_si512(_mm512_set1_ps(1.0));\
- _mm_mask_storeu_epi8(NULL, 0xFF, _mm_broadcastmb_epi64(temp))',
- 'immintrin.h'),
- ]
-
def fname2def(name):
return "HAVE_%s" % name.upper()