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* Add lspci support for Enhanced Allocation Capability.David Daney2016-01-031-0/+8
* Decode PASID and PRI extended capabilitiesDavid Woodhouse2015-10-271-0/+22
* lspci: Correct Root Capabilities "CRS Software Visibility" bitBjorn Helgaas2014-11-011-1/+1
* lspci: Decode ASPMOptComp bit in LnkCap registerMartin Mares2014-02-251-0/+1
* lspci: Clarify "PCIe-to-PCI/PCI-X" desc and Bridge Retry Config EnableBjorn Helgaas2013-11-101-2/+2
* lspci: Add L1 PM Substate capability reportingDavid Box2013-06-111-0/+1
* lspci: Display CardBus bridge capabilitiesMatthew Wilcox2013-04-201-1/+2
* Display whether LTR/OBFF are supported and enabledMika Westerberg2012-06-121-0/+4
* Add PCIe Gen 3 speeds and link status fieldsMartin Mares2011-11-081-1/+6
* TPH and LTR capability reportingMartin Mares2011-05-181-0/+20
* Updated (c) years.Martin Mares2010-01-241-1/+1
* Decoding of the SATA HBA capabilityMartin Mares2010-01-231-0/+8
* Decoding of the Vendor-Specific Capabilities (both PCI and PCIe)Martin Mares2010-01-231-0/+7
* Decoding of the Root Complex Link capabilityMartin Mares2010-01-231-0/+7
* Decoding of the Virtual Channel capabilityMartin Mares2010-01-231-0/+1
* lspci: support PCI Advanced Features capabilityYu Zhao2009-07-041-0/+9
* Make MSI-X table size match the specMichael S. Tsirkin2009-05-031-1/+1
* Support PM No_Soft_Reset bit in lspciYu Zhao2009-02-251-0/+1
* Fix ATS capability error in lspciYu Zhao2008-12-121-1/+1
* Add PCI 2.2 VPD register definitionsBen Hutchings2008-11-211-0/+7
* Added dumping of the Address Translation Services capability.Yu Zhao2008-11-101-0/+8
* Fix spelling of MSI.Martin Mares2008-11-091-2/+2
* Single Root I/O Virtualization capability supportZhao, Yu2008-08-261-0/+28
* Alternative Routing-ID Interpretation capability supportZhao, Yu2008-08-261-0/+11
* Access Control Services capability supportZhao, Yu2008-08-261-0/+20
* Advanced Error Reporting capability supportZhao, Yu2008-08-261-1/+4
* PCI Express Device, Link and Slot 2 capabilities supportZhao, Yu2008-08-261-0/+22
* Added two more capability ID's gathered from various ECN's.Martin Mares2007-10-191-0/+2
* Include capabilities from PCI 3.0 specs.Martin Mares2007-10-191-0/+2
* Fully decode PCI Express capability. Most of the PCIE extended capabilitiesMartin Mares2007-10-051-6/+47
* More bits of PCIE capability decoding.Martin Mares2007-10-051-1/+9
* Added PCI/PCI-X to PCI-Express Bridge type.Martin Mares2007-02-141-0/+1
* PCI_CLASS_DOCKING_OTHER should be 0x0a80, not 0x0a01.Martin Mares2006-09-091-1/+1
* Added PCI_CLASS_xxx constants for all classes currently defined in the pci.id...Martin Mares2006-09-091-0/+44
* Added support for MSI per-vector masking.Martin Mares2006-07-301-4/+9
* Added support for the `bridge subsystem ID' capability.Martin Mares2006-07-301-0/+5
* (no commit message)Martin Mares2006-07-301-5/+5
* Released as 2.1.99-test9.Martin Mares2006-05-051-1/+1
* Various improvements of PCI-X and PCI Express dumps.Martin Mares2006-05-051-1/+60
* HT improvements from MaciejMartin Mares2006-05-051-1/+1
* Merged more PCI Express updates.Martin Mares2006-05-051-3/+42
* Added dumping of MSI-X caps.Martin Mares2006-05-051-0/+73
* HyperTransport capability supportMartin Mares2006-05-051-2/+347
* Decode all bits in type 1 headersMartin Mares2006-05-051-1/+1
* Clean up typesMartin Mares2006-05-051-3/+3
* Removed $Id$Martin Mares2006-05-051-2/+0
* Add basic support for AGP3 fields.Martin Mares2006-05-051-11/+21
* Changed all my email addresses to mj@ucw.cz.Martin Mares2006-05-051-2/+2
* Added PCI-X stuff.Martin Mares2006-05-051-1/+52
* Updated display of power management information to PCI PM specs 1.1.Martin Mares2006-05-051-12/+16
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